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authorAaron Durbin <adurbin@chromium.org>2015-08-05 17:33:49 -0500
committerAaron Durbin <adurbin@chromium.org>2015-08-14 15:19:35 +0200
commitccb01f72453f904d6ddf994321bb40ae42276296 (patch)
treee76c880e13aeb99be42a5f3cbfe4dac99bd680f2 /src
parentc43d417039ad8f1d207c15ba0e9fb407d2091c94 (diff)
downloadcoreboot-ccb01f72453f904d6ddf994321bb40ae42276296.tar.xz
skylake: pass IED_REGION_SIZE Kconfig to FSP
Ignore the devicetree.cb setting and use the already existing IED_REGION_SIZE Kconfig option. BUG=chrome-os-partner:43636 BRANCH=None TEST=Built, booted, suspended, resumed on glados. Original-Change-Id: Ic1e760493635218faddeee4003303949305bc529 Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/290931 Original-Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com> Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Original-Trybot-Ready: David James <davidjames@chromium.org> Change-Id: I416d4eb186a42d3258682e02a0a2e1db5bb668ac Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11199 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/skylake/romstage/romstage.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c
index af9c78b585..253eaba3e8 100644
--- a/src/soc/intel/skylake/romstage/romstage.c
+++ b/src/soc/intel/skylake/romstage/romstage.c
@@ -99,7 +99,7 @@ void soc_memory_init_params(MEMORY_INIT_UPD *params)
params->MmioSize = 0x800; /* 2GB in MB */
params->TsegSize = CONFIG_SMM_TSEG_SIZE;
- params->IedSize = config->IedSize;
+ params->IedSize = CONFIG_IED_REGION_SIZE;
params->ProbelessTrace = config->ProbelessTrace;
params->EnableLan = config->EnableLan;
params->EnableSata = config->EnableSata;