summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorArthur Heymans <arthur@aheymans.xyz>2019-10-23 18:54:48 +0200
committerArthur Heymans <arthur@aheymans.xyz>2019-11-03 11:19:24 +0000
commitd05f57cfcbf069e9635c671c1ae53fcfced0c3b7 (patch)
tree6198d7d347e1dd17e28e808c336063bab9750ace /src
parent2f389f151a0db244def706bc90fd17fe091d8537 (diff)
downloadcoreboot-d05f57cfcbf069e9635c671c1ae53fcfced0c3b7.tar.xz
arch/arm64: Pass cbmem_top to ramstage via calling argument
This solution is very generic and can in principle be implemented on all arch/soc. Currently the old infrastructure to pass on information from romstage to ramstage is left in place and will be removed in a follow-up commit. Nvidia Tegra will be handled in a separate patch because it has a custom ramstage entry. Instead trying to figure out which files can be removed from stages and which cbmem_top implementations need with preprocessor, rename all cbmem_top implementation to cbmem_top_romstage. Mechanisms set in place to pass on information from rom- to ram-stage will be replaced in a followup commit. Change-Id: I86cdc5c2fac76797732a3a3398f50c4d1ff6647a Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36275 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/arch/arm64/Kconfig1
-rw-r--r--src/arch/arm64/boot.c6
-rw-r--r--src/arch/arm64/include/arch/stages.h2
-rw-r--r--src/mainboard/emulation/qemu-aarch64/Makefile.inc1
-rw-r--r--src/soc/cavium/cn81xx/Makefile.inc2
-rw-r--r--src/soc/mediatek/mt8173/Makefile.inc2
-rw-r--r--src/soc/mediatek/mt8183/Makefile.inc2
-rw-r--r--src/soc/qualcomm/qcs405/Makefile.inc1
-rw-r--r--src/soc/qualcomm/sc7180/Makefile.inc1
-rw-r--r--src/soc/qualcomm/sdm845/Makefile.inc1
-rw-r--r--src/soc/rockchip/rk3399/Makefile.inc2
11 files changed, 9 insertions, 12 deletions
diff --git a/src/arch/arm64/Kconfig b/src/arch/arm64/Kconfig
index 3d1d1843e0..0438ded429 100644
--- a/src/arch/arm64/Kconfig
+++ b/src/arch/arm64/Kconfig
@@ -17,6 +17,7 @@ config ARCH_ROMSTAGE_ARM64
config ARCH_RAMSTAGE_ARM64
bool
select ARCH_ARM64
+ select RAMSTAGE_CBMEM_TOP_ARG if !SOC_NVIDIA_TEGRA210
source src/arch/arm64/armv8/Kconfig
diff --git a/src/arch/arm64/boot.c b/src/arch/arm64/boot.c
index c6df0ee02e..479a910cae 100644
--- a/src/arch/arm64/boot.c
+++ b/src/arch/arm64/boot.c
@@ -11,6 +11,7 @@
* GNU General Public License for more details.
*/
+#include <cbmem.h>
#include <arch/cache.h>
#include <arch/lib_helpers.h>
#include <arch/stages.h>
@@ -48,7 +49,10 @@ void arch_prog_run(struct prog *prog)
}
/* Generic stage entry point. Can be overridden by board/SoC if needed. */
-__weak void stage_entry(void)
+__weak void stage_entry(uintptr_t stage_arg)
{
+ if (!ENV_ROMSTAGE_OR_BEFORE)
+ _cbmem_top_ptr = stage_arg;
+
main();
}
diff --git a/src/arch/arm64/include/arch/stages.h b/src/arch/arm64/include/arch/stages.h
index d86172b2d0..c8a3bdd20e 100644
--- a/src/arch/arm64/include/arch/stages.h
+++ b/src/arch/arm64/include/arch/stages.h
@@ -17,7 +17,7 @@
#include <stdint.h>
#include <main_decl.h>
-void stage_entry(void);
+void stage_entry(uintptr_t stage_arg);
/* This function is the romstage platform entry point, and should contain all
chipset and mainboard setup until DRAM is initialized and accessible. */
diff --git a/src/mainboard/emulation/qemu-aarch64/Makefile.inc b/src/mainboard/emulation/qemu-aarch64/Makefile.inc
index 38ecdd1a7b..dc0e9f462f 100644
--- a/src/mainboard/emulation/qemu-aarch64/Makefile.inc
+++ b/src/mainboard/emulation/qemu-aarch64/Makefile.inc
@@ -6,7 +6,6 @@
# SPDX-License-Identifier: GPL-2.0-or-later
romstage-y += cbmem.c
-ramstage-y += cbmem.c
bootblock-y += media.c
romstage-y += media.c
diff --git a/src/soc/cavium/cn81xx/Makefile.inc b/src/soc/cavium/cn81xx/Makefile.inc
index 3a36bfa6c0..ece705fd92 100644
--- a/src/soc/cavium/cn81xx/Makefile.inc
+++ b/src/soc/cavium/cn81xx/Makefile.inc
@@ -35,7 +35,6 @@ verstage-y += gpio.c
verstage-y += timer.c
verstage-y += spi.c
verstage-y += uart.c
-verstage-y += cbmem.c
################################################################################
# romstage
@@ -65,7 +64,6 @@ ramstage-y += soc.c
ramstage-y += cpu.c
ramstage-y += cpu_secondary.S
ramstage-y += ecam0.c
-ramstage-y += cbmem.c
ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += bl31_plat_params.c
diff --git a/src/soc/mediatek/mt8173/Makefile.inc b/src/soc/mediatek/mt8173/Makefile.inc
index 8632affc7e..d0c6ee9302 100644
--- a/src/soc/mediatek/mt8173/Makefile.inc
+++ b/src/soc/mediatek/mt8173/Makefile.inc
@@ -64,7 +64,7 @@ romstage-y += ../common/rtc.c rtc.c
################################################################################
-ramstage-y += ../common/cbmem.c emi.c
+ramstage-y += emi.c
ramstage-y += ../common/spi.c spi.c
ramstage-$(CONFIG_SPI_FLASH) += flash_controller.c
ramstage-y += soc.c ../common/mtcmos.c
diff --git a/src/soc/mediatek/mt8183/Makefile.inc b/src/soc/mediatek/mt8183/Makefile.inc
index e3d3db0abe..b0dd48f7a4 100644
--- a/src/soc/mediatek/mt8183/Makefile.inc
+++ b/src/soc/mediatek/mt8183/Makefile.inc
@@ -45,7 +45,7 @@ romstage-y += ../common/uart.c
romstage-y += ../common/wdt.c
ramstage-y += auxadc.c
-ramstage-y += ../common/cbmem.c emi.c
+ramstage-y += emi.c
ramstage-y += ../common/ddp.c ddp.c
ramstage-y += ../common/dsi.c dsi.c
ramstage-y += ../common/gpio.c gpio.c
diff --git a/src/soc/qualcomm/qcs405/Makefile.inc b/src/soc/qualcomm/qcs405/Makefile.inc
index f21ea542a9..0766d2f181 100644
--- a/src/soc/qualcomm/qcs405/Makefile.inc
+++ b/src/soc/qualcomm/qcs405/Makefile.inc
@@ -39,7 +39,6 @@ romstage-y += blsp.c
ramstage-y += soc.c
ramstage-y += timer.c
ramstage-y += spi.c
-ramstage-y += cbmem.c
ramstage-y += gpio.c
ramstage-y += clock.c
ramstage-y += i2c.c
diff --git a/src/soc/qualcomm/sc7180/Makefile.inc b/src/soc/qualcomm/sc7180/Makefile.inc
index bd2a134216..6d2a3e7c08 100644
--- a/src/soc/qualcomm/sc7180/Makefile.inc
+++ b/src/soc/qualcomm/sc7180/Makefile.inc
@@ -28,7 +28,6 @@ romstage-$(CONFIG_DRIVERS_UART) += uart_bitbang.c
################################################################################
ramstage-y += soc.c
-ramstage-y += cbmem.c
ramstage-y += timer.c
ramstage-y += spi.c
ramstage-y += gpio.c
diff --git a/src/soc/qualcomm/sdm845/Makefile.inc b/src/soc/qualcomm/sdm845/Makefile.inc
index fd39bd937d..4449a69023 100644
--- a/src/soc/qualcomm/sdm845/Makefile.inc
+++ b/src/soc/qualcomm/sdm845/Makefile.inc
@@ -33,7 +33,6 @@ romstage-y += mmu.c
################################################################################
ramstage-y += soc.c
ramstage-y += spi.c
-ramstage-y += cbmem.c
ramstage-y += timer.c
ramstage-y += gpio.c
ramstage-y += clock.c
diff --git a/src/soc/rockchip/rk3399/Makefile.inc b/src/soc/rockchip/rk3399/Makefile.inc
index 3b66247868..7f6ad8cac1 100644
--- a/src/soc/rockchip/rk3399/Makefile.inc
+++ b/src/soc/rockchip/rk3399/Makefile.inc
@@ -31,7 +31,6 @@ bootblock-y += gpio.c
bootblock-y += saradc.c
bootblock-y += timer.c
-verstage-y += ../common/cbmem.c
verstage-y += ../common/gpio.c
verstage-y += gpio.c
verstage-y += sdram.c
@@ -59,7 +58,6 @@ romstage-y += ../common/i2c.c
################################################################################
-ramstage-y += ../common/cbmem.c
ramstage-y += sdram.c
ramstage-y += ../common/spi.c
ramstage-y += ../common/uart.c