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author | Chris Wang <chris.wang@amd.corp-partner.google.com> | 2020-08-06 16:38:04 +0800 |
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committer | Furquan Shaikh <furquan@google.com> | 2020-09-17 06:18:59 +0000 |
commit | e019bd910f5aa58577bff92efaa2b1d6c0610e97 (patch) | |
tree | 17354a0b61639ab26f1503e744bff66585f028f1 /src | |
parent | 4735b1c01b5e7fa355813b27d0d2b601344d68b3 (diff) | |
download | coreboot-e019bd910f5aa58577bff92efaa2b1d6c0610e97.tar.xz |
ec/google/chromeec: Add dptc interface support
add the dptc interface support when system in tablet mode.
In some FP5/FT5 platform, which will have different power or thermal
parameters depends on different form factor.
BUG=b:157943445
BRANCH=Zork
TEST=Build. check the setting changed.
Signed-off-by: Chris Wang <chris.wang@amd.corp-partner.google.com>
Change-Id: I2be7942132cea474237f531021ad4fd9856b5050
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44265
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/ec/google/chromeec/acpi/ec.asl | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/src/ec/google/chromeec/acpi/ec.asl b/src/ec/google/chromeec/acpi/ec.asl index f8d4bdf828..e2fa2ded87 100644 --- a/src/ec/google/chromeec/acpi/ec.asl +++ b/src/ec/google/chromeec/acpi/ec.asl @@ -10,7 +10,10 @@ #ifdef DPTF_ENABLE_CHARGER External (\_SB.DPTF.TCHG, DeviceObj) #endif - +/* Enable DPTC interface with AMD ALIB */ +#ifdef EC_ENABLE_AMD_DPTC_SUPPORT +External(\_SB.DPTC, MethodObj) +#endif Device (EC0) { @@ -380,6 +383,11 @@ Device (EC0) #ifdef EC_ENABLE_TBMC_DEVICE Notify (TBMC, 0x80) #endif +#ifdef EC_ENABLE_AMD_DPTC_SUPPORT + If (CondRefOf (\_SB.DPTC)) { + \_SB.DPTC() + } +#endif } /* |