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authorWarren Turkal <wt@penguintechs.org>2010-09-27 21:18:26 +0000
committerStefan Reinauer <stepan@openbios.org>2010-09-27 21:18:26 +0000
commite0afe735a0fa0564a9ab082593c60f56c291493a (patch)
treeab01ea91c8cdcdec898cc50afd4954284d7f7eb0 /src
parent768d8ea09830a02fe815b8b60825430a3ec6a10a (diff)
downloadcoreboot-e0afe735a0fa0564a9ab082593c60f56c291493a.tar.xz
All these boards already had the CACHE_AS_RAM option in their individual
configs. I just moved it the the CPU that they all use. Signed-off-by: Warren Turkal <wt@penguintechs.org> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5871 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r--src/cpu/amd/model_lx/Kconfig14
-rw-r--r--src/mainboard/amd/db800/Kconfig1
-rw-r--r--src/mainboard/amd/norwich/Kconfig1
-rw-r--r--src/mainboard/artecgroup/dbe61/Kconfig1
-rw-r--r--src/mainboard/digitallogic/msm800sev/Kconfig1
-rw-r--r--src/mainboard/iei/pcisa-lx-800-r10/Kconfig1
-rw-r--r--src/mainboard/lippert/hurricane-lx/Kconfig1
-rw-r--r--src/mainboard/lippert/literunner-lx/Kconfig1
-rw-r--r--src/mainboard/lippert/roadrunner-lx/Kconfig1
-rw-r--r--src/mainboard/lippert/spacerunner-lx/Kconfig1
-rw-r--r--src/mainboard/pcengines/alix1c/Kconfig1
-rw-r--r--src/mainboard/pcengines/alix2d/Kconfig1
-rw-r--r--src/mainboard/traverse/geos/Kconfig1
-rw-r--r--src/mainboard/winent/pl6064/Kconfig1
14 files changed, 8 insertions, 19 deletions
diff --git a/src/cpu/amd/model_lx/Kconfig b/src/cpu/amd/model_lx/Kconfig
index 07bbce4f0b..742ef6911a 100644
--- a/src/cpu/amd/model_lx/Kconfig
+++ b/src/cpu/amd/model_lx/Kconfig
@@ -1,25 +1,27 @@
config CPU_AMD_LX
bool
+if CPU_AMD_LX
+
+config CPU_SPECIFIC_OPTIONS
+ def_bool y
+ select CACHE_AS_RAM
+
config DCACHE_RAM_BASE
hex
default 0xc8000
- depends on CPU_AMD_LX
config DCACHE_RAM_SIZE
hex
default 0x8000
- depends on CPU_AMD_LX
config GEODE_VSA
bool
default y
- depends on CPU_AMD_LX
select PCI_OPTION_ROM_RUN_REALMODE
config GEODE_VSA_FILE
bool "Add a VSA image"
- depends on CPU_AMD_LX
help
Select this option if you have an AMD Geode LX vsa that you would
like to add to your ROM.
@@ -29,9 +31,9 @@ config GEODE_VSA_FILE
config VSA_FILENAME
string "AMD Geode LX VSA path and filename"
- depends on GEODE_VSA_FILE && CPU_AMD_LX
+ depends on GEODE_VSA_FILE
default "gpl_vsa_lx_102.bin"
help
The path and filename of the file to use as VSA.
-
+endif # CPU_AMD_LX
diff --git a/src/mainboard/amd/db800/Kconfig b/src/mainboard/amd/db800/Kconfig
index b973c9dad8..e1b94e9011 100644
--- a/src/mainboard/amd/db800/Kconfig
+++ b/src/mainboard/amd/db800/Kconfig
@@ -10,7 +10,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_PIRQ_TABLE
select PIRQ_ROUTE
select UDELAY_TSC
- select CACHE_AS_RAM
select BOARD_ROMSIZE_KB_256
config MAINBOARD_DIR
diff --git a/src/mainboard/amd/norwich/Kconfig b/src/mainboard/amd/norwich/Kconfig
index 6c65f4de1a..3dc214f00d 100644
--- a/src/mainboard/amd/norwich/Kconfig
+++ b/src/mainboard/amd/norwich/Kconfig
@@ -9,7 +9,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_PIRQ_TABLE
select PIRQ_ROUTE
select UDELAY_TSC
- select CACHE_AS_RAM
select BOARD_ROMSIZE_KB_256
config MAINBOARD_DIR
diff --git a/src/mainboard/artecgroup/dbe61/Kconfig b/src/mainboard/artecgroup/dbe61/Kconfig
index 9dfb0ca72a..52669294f7 100644
--- a/src/mainboard/artecgroup/dbe61/Kconfig
+++ b/src/mainboard/artecgroup/dbe61/Kconfig
@@ -9,7 +9,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_PIRQ_TABLE
select PIRQ_ROUTE
select UDELAY_TSC
- select CACHE_AS_RAM
select BOARD_ROMSIZE_KB_256
config MAINBOARD_DIR
diff --git a/src/mainboard/digitallogic/msm800sev/Kconfig b/src/mainboard/digitallogic/msm800sev/Kconfig
index f98101b03a..a082b1fe01 100644
--- a/src/mainboard/digitallogic/msm800sev/Kconfig
+++ b/src/mainboard/digitallogic/msm800sev/Kconfig
@@ -10,7 +10,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_PIRQ_TABLE
select PIRQ_ROUTE
select UDELAY_TSC
- select CACHE_AS_RAM
select BOARD_ROMSIZE_KB_256
config MAINBOARD_DIR
diff --git a/src/mainboard/iei/pcisa-lx-800-r10/Kconfig b/src/mainboard/iei/pcisa-lx-800-r10/Kconfig
index 7bef792a0b..a6f5126633 100644
--- a/src/mainboard/iei/pcisa-lx-800-r10/Kconfig
+++ b/src/mainboard/iei/pcisa-lx-800-r10/Kconfig
@@ -9,7 +9,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select SUPERIO_WINBOND_W83627HF
select HAVE_PIRQ_TABLE
select PIRQ_ROUTE
- select CACHE_AS_RAM
select BOARD_ROMSIZE_KB_256
config MAINBOARD_DIR
diff --git a/src/mainboard/lippert/hurricane-lx/Kconfig b/src/mainboard/lippert/hurricane-lx/Kconfig
index b30b8bba45..027988f959 100644
--- a/src/mainboard/lippert/hurricane-lx/Kconfig
+++ b/src/mainboard/lippert/hurricane-lx/Kconfig
@@ -10,7 +10,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_PIRQ_TABLE
select PIRQ_ROUTE
select UDELAY_TSC
- select CACHE_AS_RAM
# Board is equipped with a 1 MB SPI flash, however, due to limitations
# of the IT8712F Super I/O, only the top 512 KB are directly mapped.
select BOARD_ROMSIZE_KB_512
diff --git a/src/mainboard/lippert/literunner-lx/Kconfig b/src/mainboard/lippert/literunner-lx/Kconfig
index 4f4b28902c..482f571e8d 100644
--- a/src/mainboard/lippert/literunner-lx/Kconfig
+++ b/src/mainboard/lippert/literunner-lx/Kconfig
@@ -11,7 +11,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_PIRQ_TABLE
select PIRQ_ROUTE
select UDELAY_TSC
- select CACHE_AS_RAM
# Board is equipped with a 1 MB SPI flash, however, due to limitations
# of the IT8712F Super I/O, only the top 512 KB are directly mapped.
select BOARD_ROMSIZE_KB_512
diff --git a/src/mainboard/lippert/roadrunner-lx/Kconfig b/src/mainboard/lippert/roadrunner-lx/Kconfig
index ef6171fa50..44326d193f 100644
--- a/src/mainboard/lippert/roadrunner-lx/Kconfig
+++ b/src/mainboard/lippert/roadrunner-lx/Kconfig
@@ -10,7 +10,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_PIRQ_TABLE
select PIRQ_ROUTE
select UDELAY_TSC
- select CACHE_AS_RAM
# Standard chip is a 512 KB FWH. Replacing it with a 1 MB
# SST 49LF008A is possible.
select BOARD_ROMSIZE_KB_512
diff --git a/src/mainboard/lippert/spacerunner-lx/Kconfig b/src/mainboard/lippert/spacerunner-lx/Kconfig
index 89a52ae1a6..7526d1ecb4 100644
--- a/src/mainboard/lippert/spacerunner-lx/Kconfig
+++ b/src/mainboard/lippert/spacerunner-lx/Kconfig
@@ -11,7 +11,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_PIRQ_TABLE
select PIRQ_ROUTE
select UDELAY_TSC
- select CACHE_AS_RAM
# Board is equipped with a 1 MB SPI flash, however, due to limitations
# of the IT8712F Super I/O, only the top 512 KB are directly mapped.
select BOARD_ROMSIZE_KB_512
diff --git a/src/mainboard/pcengines/alix1c/Kconfig b/src/mainboard/pcengines/alix1c/Kconfig
index 395df75eb2..b10095c902 100644
--- a/src/mainboard/pcengines/alix1c/Kconfig
+++ b/src/mainboard/pcengines/alix1c/Kconfig
@@ -10,7 +10,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_PIRQ_TABLE
select PIRQ_ROUTE
select UDELAY_TSC
- select CACHE_AS_RAM
select BOARD_ROMSIZE_KB_512
config MAINBOARD_DIR
diff --git a/src/mainboard/pcengines/alix2d/Kconfig b/src/mainboard/pcengines/alix2d/Kconfig
index bd363f3407..bb54d1cad1 100644
--- a/src/mainboard/pcengines/alix2d/Kconfig
+++ b/src/mainboard/pcengines/alix2d/Kconfig
@@ -9,7 +9,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_PIRQ_TABLE
select PIRQ_ROUTE
select UDELAY_TSC
- select CACHE_AS_RAM
select BOARD_ROMSIZE_KB_512
config MAINBOARD_DIR
diff --git a/src/mainboard/traverse/geos/Kconfig b/src/mainboard/traverse/geos/Kconfig
index c1d1af41a0..1c85149671 100644
--- a/src/mainboard/traverse/geos/Kconfig
+++ b/src/mainboard/traverse/geos/Kconfig
@@ -9,7 +9,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_PIRQ_TABLE
select PIRQ_ROUTE
select UDELAY_TSC
- select CACHE_AS_RAM
select BOARD_ROMSIZE_KB_1024
config MAINBOARD_DIR
diff --git a/src/mainboard/winent/pl6064/Kconfig b/src/mainboard/winent/pl6064/Kconfig
index df6db01198..1ec56929d5 100644
--- a/src/mainboard/winent/pl6064/Kconfig
+++ b/src/mainboard/winent/pl6064/Kconfig
@@ -10,7 +10,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_PIRQ_TABLE
select PIRQ_ROUTE
select UDELAY_TSC
- select CACHE_AS_RAM
select BOARD_ROMSIZE_KB_512
config MAINBOARD_DIR