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| author | Vikram Narayanan <vikram186@gmail.com> | 2012-01-23 01:44:44 +0530 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-01-23 22:50:56 +0100 |
| commit | 0713ca3f8493ee89103b4826137bd64f59c88933 (patch) | |
| tree | bc137ad8444b98cd5a468e09a21de1b80b836edd /src | |
| parent | 15370ca0688beff07cfbdf69ef47b0284227ef03 (diff) | |
| download | coreboot-0713ca3f8493ee89103b4826137bd64f59c88933.tar.xz | |
post code: Replaced hard-coded post code with macro
Added a macro in the post code list, which replaces hard coded
value in cpu/x86/cache/cache.c
Change-Id: I27cb27827272584a8a17a41c111e2dc155196a97
Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
Reviewed-on: http://review.coreboot.org/572
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/cpu/x86/cache/cache.c | 3 | ||||
| -rw-r--r-- | src/include/console/post_codes.h | 7 |
2 files changed, 8 insertions, 2 deletions
diff --git a/src/cpu/x86/cache/cache.c b/src/cpu/x86/cache/cache.c index a7cba4ac5c..1df9e08014 100644 --- a/src/cpu/x86/cache/cache.c +++ b/src/cpu/x86/cache/cache.c @@ -3,8 +3,7 @@ void x86_enable_cache(void) { - post_code(0x60); + post_code(POST_ENABLING_CACHE); printk(BIOS_INFO, "Enabling cache\n"); enable_cache(); } - diff --git a/src/include/console/post_codes.h b/src/include/console/post_codes.h index a72da69bd5..1d12e5ad3f 100644 --- a/src/include/console/post_codes.h +++ b/src/include/console/post_codes.h @@ -106,6 +106,13 @@ #define POST_CONSOLE_BOOT_MSG 0x40 /** + * \brief Before enabling the cache + * + * Going to enable the cache + */ +#define POST_ENABLING_CACHE 0x60 + +/** * \brief Devices have been enumerated * * Bus scan, and device enumeration has completed. |