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authorHung-Te Lin <hungte@chromium.org>2013-06-12 15:01:56 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-07-10 22:36:33 +0200
commit2867060098e4023a2d33d335afe49981584ec378 (patch)
tree19aeb644b9fbf46660aebc0e8c1c24f6787cece9 /src
parent83fd23925509026734833c9d8d28890029899458 (diff)
downloadcoreboot-2867060098e4023a2d33d335afe49981584ec378.tar.xz
arm: Fix memory barrier usage in IO operation
The dmb should be executed before reading operations, and before/after writing operations. Change-Id: I572136a2f9a07eb2c38a112f5deeb2de0c0fd46c Signed-off-by: Hung-Te Lin <hungte@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3682 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/arch/armv7/include/arch/io.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/arch/armv7/include/arch/io.h b/src/arch/armv7/include/arch/io.h
index b4932dc52a..be1da51c71 100644
--- a/src/arch/armv7/include/arch/io.h
+++ b/src/arch/armv7/include/arch/io.h
@@ -29,41 +29,41 @@
static inline uint8_t read8(const void *addr)
{
- uint8_t v = *(volatile uint8_t *)addr;
dmb();
- return v;
+ return *(volatile uint8_t *)addr;
}
static inline uint16_t read16(const void *addr)
{
- uint16_t v = *(volatile uint16_t *)addr;
dmb();
- return v;
+ return *(volatile uint16_t *)addr;
}
static inline uint32_t read32(const void *addr)
{
- uint32_t v = *(volatile uint32_t *)addr;
dmb();
- return v;
+ return *(volatile uint32_t *)addr;
}
static inline void write8(uint8_t val, const void *addr)
{
dmb();
*(volatile uint8_t *)addr = val;
+ dmb();
}
static inline void write16(uint16_t val, const void *addr)
{
dmb();
*(volatile uint16_t *)addr = val;
+ dmb();
}
static inline void write32(uint32_t val, const void *addr)
{
dmb();
*(volatile uint32_t *)addr = val;
+ dmb();
}
/*