diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2013-06-11 16:17:56 -0700 |
|---|---|---|
| committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2013-12-02 19:01:10 +0100 |
| commit | 39536e955a93d025f941dcb51bff640815212d15 (patch) | |
| tree | ca9c31450a0b504320d17e9bbecfae622ef5e56c /src | |
| parent | ccd2f28fc46793381d1f628a94baf25f784cf8ed (diff) | |
| download | coreboot-39536e955a93d025f941dcb51bff640815212d15.tar.xz | |
falco: Update panel power sequence timings
These are based on the datasheet and I included the timing
values I used from the docs.
Change-Id: Ib75b2c5e50ac09d1e4cf9dd22229bb0f0a8965a4
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/58540
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4234
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/falco/devicetree.cb | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/google/falco/devicetree.cb b/src/mainboard/google/falco/devicetree.cb index b9bc47fb17..21858e74fa 100644 --- a/src/mainboard/google/falco/devicetree.cb +++ b/src/mainboard/google/falco/devicetree.cb @@ -15,11 +15,11 @@ chip northbridge/intel/haswell # Enable Panel and configure power delays register "gpu_panel_port_select" = "1" # eDP - register "gpu_panel_power_cycle_delay" = "5" # 400ms - register "gpu_panel_power_up_delay" = "400" # 40ms - register "gpu_panel_power_down_delay" = "150" # 15ms - register "gpu_panel_power_backlight_on_delay" = "2100" # 210ms - register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms + register "gpu_panel_power_cycle_delay" = "5" # 400ms (T4) + register "gpu_panel_power_up_delay" = "600" # 60ms (T1+T2) + register "gpu_panel_power_down_delay" = "600" # 60ms (T3+T7) + register "gpu_panel_power_backlight_on_delay" = "2100" # 210ms (T5) + register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms (T6) device cpu_cluster 0 on chip cpu/intel/socket_rPGA989 |