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| author | Aaron Durbin <adurbin@chromium.org> | 2016-07-13 23:19:46 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-07-15 08:31:44 +0200 |
| commit | 56db47fe204482093b23034030f7a7060c5c977b (patch) | |
| tree | 77a9a7c2be7adf06306059725e7717f845e6f74c /src | |
| parent | ed35b7c54611feabbf91c5cd4626ccfceff796e7 (diff) | |
| download | coreboot-56db47fe204482093b23034030f7a7060c5c977b.tar.xz | |
soc/intel/common: use common Intel ACPI hardware definitions
Transition to using the common Intel ACPI hardware definitions
generic ACPI definitions.
BUG=chrome-os-partner:54977
Change-Id: I40560b2a65a0cff6808ccdec80e0339786bf8908
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15668
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/common/smihandler.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/soc/intel/common/smihandler.c b/src/soc/intel/common/smihandler.c index 5915587b50..f0c913fcaa 100644 --- a/src/soc/intel/common/smihandler.c +++ b/src/soc/intel/common/smihandler.c @@ -137,14 +137,14 @@ void southbridge_smi_sleep(const struct smm_save_state_ops *save_state_ops) /* Figure out SLP_TYP */ reg32 = inl(ACPI_PMIO_BASE + PM1_CNT); printk(BIOS_SPEW, "SMI#: SLP = 0x%08x\n", reg32); - slp_typ = (reg32 >> 10) & 7; + slp_typ = acpi_sleep_from_pm1(reg32); /* Do any mainboard sleep handling */ - mainboard_smi_sleep(slp_typ-2); + mainboard_smi_sleep(slp_typ); /* Log S3, S4, and S5 entry */ - if (slp_typ >= 5 && IS_ENABLED(CONFIG_ELOG_GSMI)) - elog_add_event_byte(ELOG_TYPE_ACPI_ENTER, slp_typ-2); + if (slp_typ >= ACPI_S3 && IS_ENABLED(CONFIG_ELOG_GSMI)) + elog_add_event_byte(ELOG_TYPE_ACPI_ENTER, slp_typ); /* Clear pending GPE events */ clear_gpe_status(); @@ -152,19 +152,19 @@ void southbridge_smi_sleep(const struct smm_save_state_ops *save_state_ops) /* Next, do the deed. */ switch (slp_typ) { - case SLP_TYP_S0: + case ACPI_S0: printk(BIOS_DEBUG, "SMI#: Entering S0 (On)\n"); break; - case SLP_TYP_S3: + case ACPI_S3: printk(BIOS_DEBUG, "SMI#: Entering S3 (Suspend-To-RAM)\n"); /* Invalidate the cache before going to S3 */ wbinvd(); break; - case SLP_TYP_S4: + case ACPI_S4: printk(BIOS_DEBUG, "SMI#: Entering S4 (Suspend-To-Disk)\n"); break; - case SLP_TYP_S5: + case ACPI_S5: printk(BIOS_DEBUG, "SMI#: Entering S5 (Soft Power off)\n"); /* Disable all GPE */ @@ -188,7 +188,7 @@ void southbridge_smi_sleep(const struct smm_save_state_ops *save_state_ops) enable_pm1_control(SLP_EN); /* Make sure to stop executing code here for S3/S4/S5 */ - if (slp_typ > 1) + if (slp_typ >= ACPI_S3) hlt(); /* |