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authorAntonello Dettori <dev@dettori.io>2016-09-03 10:45:33 +0200
committerMartin Roth <martinroth@google.com>2016-09-10 04:55:22 +0200
commit60a6e153b02bbd968695326a50481922927a1896 (patch)
tree43044f6988b41965d84e0081d3677b14fdfe00b8 /src
parent100471057916cbc2d03711cca8f27bf036cdb778 (diff)
downloadcoreboot-60a6e153b02bbd968695326a50481922927a1896.tar.xz
northbridge/intel/x4x: transition away from device_t
Replace the use of the old device_t definition inside northbridge/intel/x4x. Change-Id: I65cd02eacf57cb41ded434582ca6e9d9f655e6ea Signed-off-by: Antonello Dettori <dev@dettori.io> Reviewed-on: https://review.coreboot.org/16472 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/northbridge/intel/x4x/early_init.c2
-rw-r--r--src/northbridge/intel/x4x/x4x.h2
2 files changed, 3 insertions, 1 deletions
diff --git a/src/northbridge/intel/x4x/early_init.c b/src/northbridge/intel/x4x/early_init.c
index a430538718..1b0d4f97fe 100644
--- a/src/northbridge/intel/x4x/early_init.c
+++ b/src/northbridge/intel/x4x/early_init.c
@@ -23,7 +23,7 @@
void x4x_early_init(void)
{
- const device_t d0f0 = PCI_DEV(0, 0, 0);
+ const pci_devfn_t d0f0 = PCI_DEV(0, 0, 0);
/* Setup MCHBAR. */
pci_write_config32(d0f0, D0F0_MCHBAR_LO, (uintptr_t)DEFAULT_MCHBAR | 1);
diff --git a/src/northbridge/intel/x4x/x4x.h b/src/northbridge/intel/x4x/x4x.h
index 24340679e0..ffad0d4735 100644
--- a/src/northbridge/intel/x4x/x4x.h
+++ b/src/northbridge/intel/x4x/x4x.h
@@ -324,6 +324,8 @@ void sdram_initialize(int boot_path, const u8 *spd_map);
void raminit_ddr2(struct sysinfo *);
struct acpi_rsdp;
+#ifndef __SIMPLE_DEVICE__
unsigned long northbridge_write_acpi_tables(device_t device, unsigned long start, struct acpi_rsdp *rsdp);
+#endif /* __SIMPLE_DEVICE__ */
#endif
#endif /* __NORTHBRIDGE_INTEL_X4X_H__ */