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author | Matt DeVillier <matt.devillier@gmail.com> | 2017-06-13 16:54:00 -0500 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2017-06-14 21:38:24 +0200 |
commit | 660de34bbf0c9843120ffa2e861d26718e3205e3 (patch) | |
tree | 9aeb8563294ed11af5ce31eaedb295095e4a4e24 /src | |
parent | 296c79c9beb13a2d6741862fb1f0d10ea858e4c7 (diff) | |
download | coreboot-660de34bbf0c9843120ffa2e861d26718e3205e3.tar.xz |
drivers/fsp1_1: decouple VBT from execution of GOP driver
Commit 2e7f6cc introduced the 'no graphics init' option for
FSP 1.1 SoCs using a GOP driver to init the display, but selecting
that option while including a VBT breaks compilation for Braswell
and Skylake devices because the VBT and GOP driver are intertwined.
This patch decouples the VBT from the GOP driver execution,
allowing the 'no graphics init' option to compile (and work)
properly when CONFIG_ADD_VBT_DATA_FILE=y.
Change-Id: Ifbcf32805177c290c4781b32bbcca679bcb0c297
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/20210
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Youness Alaoui <snifikino@gmail.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/drivers/intel/fsp1_1/Makefile.inc | 2 | ||||
-rw-r--r-- | src/drivers/intel/fsp1_1/fsp_gop.c | 39 | ||||
-rw-r--r-- | src/drivers/intel/fsp1_1/vbt.c | 39 |
3 files changed, 40 insertions, 40 deletions
diff --git a/src/drivers/intel/fsp1_1/Makefile.inc b/src/drivers/intel/fsp1_1/Makefile.inc index d0e2856c37..22d24ee080 100644 --- a/src/drivers/intel/fsp1_1/Makefile.inc +++ b/src/drivers/intel/fsp1_1/Makefile.inc @@ -38,7 +38,7 @@ ramstage-y += fsp_util.c ramstage-y += hob.c ramstage-y += ramstage.c ramstage-y += stage_cache.c -ramstage-$(CONFIG_RUN_FSP_GOP) += vbt.c +ramstage-$(CONFIG_ADD_VBT_DATA_FILE) += vbt.c ramstage-$(CONFIG_MMA) += mma_core.c CPPFLAGS_common += -Isrc/drivers/intel/fsp1_1/include diff --git a/src/drivers/intel/fsp1_1/fsp_gop.c b/src/drivers/intel/fsp1_1/fsp_gop.c index dd190145e1..c5aae5c183 100644 --- a/src/drivers/intel/fsp1_1/fsp_gop.c +++ b/src/drivers/intel/fsp1_1/fsp_gop.c @@ -14,49 +14,10 @@ */ #include <boot/coreboot_tables.h> -#include <cbfs.h> #include <console/console.h> #include <fsp/util.h> #include <lib.h> -/* Reading VBT table from flash */ -const optionrom_vbt_t *fsp_get_vbt(uint32_t *vbt_len) -{ - size_t vbt_size; - union { - const optionrom_vbt_t *data; - uint32_t *signature; - } vbt; - - /* Locate the vbt file in cbfs */ - vbt.data = cbfs_boot_map_with_leak("vbt.bin", CBFS_TYPE_RAW, &vbt_size); - if (!vbt.data) { - printk(BIOS_INFO, - "FSP_INFO: VBT data file (vbt.bin) not found in CBFS"); - return NULL; - } - - /* Validate the vbt file */ - if (*vbt.signature != VBT_SIGNATURE) { - printk(BIOS_WARNING, - "FSP_WARNING: Invalid signature in VBT data file (vbt.bin)!\n"); - return NULL; - } - *vbt_len = vbt_size; - printk(BIOS_DEBUG, "FSP_INFO: VBT found at %p, 0x%08x bytes\n", - vbt.data, *vbt_len); - -#if IS_ENABLED(CONFIG_DISPLAY_VBT) - /* Display the vbt file contents */ - printk(BIOS_DEBUG, "VBT Data:\n"); - hexdump(vbt.data, *vbt_len); - printk(BIOS_DEBUG, "\n"); -#endif - - /* Return the pointer to the vbt file data */ - return vbt.data; -} - int fill_lb_framebuffer(struct lb_framebuffer *framebuffer) { VOID *hob_list_ptr; diff --git a/src/drivers/intel/fsp1_1/vbt.c b/src/drivers/intel/fsp1_1/vbt.c index 414b88d95a..5cac150d01 100644 --- a/src/drivers/intel/fsp1_1/vbt.c +++ b/src/drivers/intel/fsp1_1/vbt.c @@ -15,10 +15,49 @@ */ #include <bootmode.h> +#include <cbfs.h> #include <console/console.h> #include <fsp/ramstage.h> #include <fsp/util.h> +/* Reading VBT table from flash */ +const optionrom_vbt_t *fsp_get_vbt(uint32_t *vbt_len) +{ + size_t vbt_size; + union { + const optionrom_vbt_t *data; + uint32_t *signature; + } vbt; + + /* Locate the vbt file in cbfs */ + vbt.data = cbfs_boot_map_with_leak("vbt.bin", CBFS_TYPE_RAW, &vbt_size); + if (!vbt.data) { + printk(BIOS_INFO, + "FSP_INFO: VBT data file (vbt.bin) not found in CBFS"); + return NULL; + } + + /* Validate the vbt file */ + if (*vbt.signature != VBT_SIGNATURE) { + printk(BIOS_WARNING, + "FSP_WARNING: Invalid signature in VBT data file (vbt.bin)!\n"); + return NULL; + } + *vbt_len = vbt_size; + printk(BIOS_DEBUG, "FSP_INFO: VBT found at %p, 0x%08x bytes\n", + vbt.data, *vbt_len); + +#if IS_ENABLED(CONFIG_DISPLAY_VBT) + /* Display the vbt file contents */ + printk(BIOS_DEBUG, "VBT Data:\n"); + hexdump(vbt.data, *vbt_len); + printk(BIOS_DEBUG, "\n"); +#endif + + /* Return the pointer to the vbt file data */ + return vbt.data; +} + /* Locate VBT and pass it to FSP GOP */ void load_vbt(uint8_t s3_resume, SILICON_INIT_UPD *params) { |