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| author | Corey Osgood <corey.osgood@gmail.com> | 2008-12-19 03:33:37 +0000 |
|---|---|---|
| committer | Corey Osgood <corey.osgood@gmail.com> | 2008-12-19 03:33:37 +0000 |
| commit | 716e5670fe5a2edcb66e587ec5a31377b2099ba8 (patch) | |
| tree | 4370fd567137dc79383aa6b78719de933713cc92 /src | |
| parent | fbfdba70fa99d04693d6f3d8d64a89f79ff76d8e (diff) | |
| download | coreboot-716e5670fe5a2edcb66e587ec5a31377b2099ba8.tar.xz | |
I honestly have no idea if the previous use of the vt8235's serial functions
worked or not, but my board doesn't have COM1, and those function don't
support using COM2, so I've changed auto.c to use the fintek f71805f
functions, the fintek is the onboard super io. I also cleaned up a
whitespace issue and unused variable.
Signed-off-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3821 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/jetway/j7f24/auto.c | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/src/mainboard/jetway/j7f24/auto.c b/src/mainboard/jetway/j7f24/auto.c index 62a3b2646e..15764e932c 100644 --- a/src/mainboard/jetway/j7f24/auto.c +++ b/src/mainboard/jetway/j7f24/auto.c @@ -38,7 +38,13 @@ #include "lib/delay.c" #include "cpu/x86/lapic/boot_cpu.c" #include "southbridge/via/vt8237r/vt8237r_early_smbus.c" -#include "southbridge/via/vt8235/vt8235_early_serial.c" +#include "superio/fintek/f71805f/f71805f_early_serial.c" + +#if TTYS0_BASE == 0x2f8 +#define SERIAL_DEV PNP_DEV(0x2e, F71805F_SP2) +#else +#define SERIAL_DEV PNP_DEV(0x2e, F71805F_SP1) +#endif static void memreset_setup(void) { @@ -54,8 +60,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) static void enable_mainboard_devices(void) { device_t dev; - u8 reg; - + dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), 0); if (dev == PCI_DEV_INVALID) die("Southbridge not found!!!\n"); @@ -96,7 +101,7 @@ static void main(unsigned long bist) /* Enable multifunction for northbridge. */ pci_write_config8(ctrl.d0f0, 0x4f, 0x01); - enable_vt8235_serial(); + f71805f_enable_serial(SERIAL_DEV, TTYS0_BASE); uart_init(); console_init(); |