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| author | Jacob Garber <jgarber1@ualberta.ca> | 2019-06-06 12:13:14 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-06-21 09:14:43 +0000 |
| commit | 7d881b5189efea7e9ee3f64e36964c951001e1a1 (patch) | |
| tree | cf7b6531f3a90f4d445e22621cc7f78efd6159c7 /src | |
| parent | f69c96dd8d857a90143f1c2f38efd19e26b68039 (diff) | |
| download | coreboot-7d881b5189efea7e9ee3f64e36964c951001e1a1.tar.xz | |
nb/amd/amdmct/mct_ddr3: Remove unused code
As described in the comment, the BKDG-recommended algorithm causes
problems and isn't being used, so just delete it.
Change-Id: Ib3d4eba7ea2d7f6545613af5670b243bc011275f
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 1347325, 1347326
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33269
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c index ab16887f1d..42f313ab92 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c @@ -1213,13 +1213,6 @@ void procConfig(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstat, ui Seed_Fine = (SeedTotal[ByteLane] % 32) + 32; } - if (Seed_Gross == 0) - Seed_PreGross = 0; - else if (Seed_Gross & 0x1) - Seed_PreGross = 1; - else - Seed_PreGross = 2; - /* The BKDG-recommended algorithm causes problems with registered DIMMs on some systems * due to the long register delays causing premature total delay wrap-around. * Attempt to work around this... |