diff options
author | Julien Viard de Galbert <jviarddegalbert@online.net> | 2018-03-01 16:03:31 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-05-14 21:03:04 +0000 |
commit | 7ebb6b0f00ed6b8f92749cc4b035f02c001197e7 (patch) | |
tree | 7ad769f97cbbb0184f09063732802bd0f9cf6734 /src | |
parent | a78e66e5f4cc032968dc8e6f8e76e550d87dafc8 (diff) | |
download | coreboot-7ebb6b0f00ed6b8f92749cc4b035f02c001197e7.tar.xz |
soc/intel/denverton_ns + mb: Rename gpio configuration
In order to use the shared code in intelblock, this patch renames the
denverton specific implementation to not use the same names (for files
and types).
- rename pad_config to remove conflict with soc/.../intelblocks/gpio.h
- rename gpio.c, soc/gpio.h to not conflict with intelblock
Note: There is no functional change in this patch.
Change-Id: Id3f4e2dc0a118e8c864a96a435fa22e32bbe684f
Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net>
Reviewed-on: https://review.coreboot.org/24926
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/intel/harcuvar/gpio.h | 4 | ||||
-rw-r--r-- | src/mainboard/intel/harcuvar/romstage.c | 4 | ||||
-rw-r--r-- | src/mainboard/scaleway/tagada/gpio.h | 4 | ||||
-rw-r--r-- | src/mainboard/scaleway/tagada/romstage.c | 4 | ||||
-rw-r--r-- | src/soc/intel/denverton_ns/Makefile.inc | 2 | ||||
-rw-r--r-- | src/soc/intel/denverton_ns/gpio_dnv.c (renamed from src/soc/intel/denverton_ns/gpio.c) | 8 | ||||
-rw-r--r-- | src/soc/intel/denverton_ns/include/soc/gpio_dnv.h (renamed from src/soc/intel/denverton_ns/include/soc/gpio.h) | 4 |
7 files changed, 15 insertions, 15 deletions
diff --git a/src/mainboard/intel/harcuvar/gpio.h b/src/mainboard/intel/harcuvar/gpio.h index a96b435bb8..1ef465aa19 100644 --- a/src/mainboard/intel/harcuvar/gpio.h +++ b/src/mainboard/intel/harcuvar/gpio.h @@ -17,10 +17,10 @@ #ifndef _MAINBOARD_GPIO_H #define _MAINBOARD_GPIO_H -#include <soc/gpio.h> +#include <soc/gpio_dnv.h> #ifndef __ACPI__ -const struct pad_config harcuvar_gpio_table[] = { +const struct dnv_pad_config harcuvar_gpio_table[] = { // GBE0_SDP0 (GPIO_14) {NORTH_ALL_GBE0_SDP0, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirInOut, GpioOutDefault, diff --git a/src/mainboard/intel/harcuvar/romstage.c b/src/mainboard/intel/harcuvar/romstage.c index f0c7cb96fe..e3a0a01166 100644 --- a/src/mainboard/intel/harcuvar/romstage.c +++ b/src/mainboard/intel/harcuvar/romstage.c @@ -89,7 +89,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd); void mainboard_config_gpios(void) { size_t num; - const struct pad_config *table; + const struct dnv_pad_config *table; uint8_t boardid = board_id(); /* Configure pads prior to SiliconInit() in case there's any @@ -113,7 +113,7 @@ void mainboard_config_gpios(void) printk(BIOS_INFO, "GPIO table: 0x%x, entry num: 0x%x!\n", (uint32_t)table, (uint32_t)num); - gpio_configure_pads(table, num); + gpio_configure_dnv_pads(table, num); } void mainboard_memory_init_params(FSPM_UPD *mupd) diff --git a/src/mainboard/scaleway/tagada/gpio.h b/src/mainboard/scaleway/tagada/gpio.h index d8468f6389..68cf155da0 100644 --- a/src/mainboard/scaleway/tagada/gpio.h +++ b/src/mainboard/scaleway/tagada/gpio.h @@ -18,10 +18,10 @@ #ifndef _MAINBOARD_GPIO_H #define _MAINBOARD_GPIO_H -#include <soc/gpio.h> +#include <soc/gpio_dnv.h> #ifndef __ACPI__ -const struct pad_config tagada_gpio_config[] = { +const struct dnv_pad_config tagada_gpio_config[] = { // GBE0_SDP0 (GPIO_14) NC /*ME { NORTH_ALL_GBE0_SDP0, { GpioPadModeNative1, GpioHostOwnGpio, GpioDirInOut, GpioOutDefault, GpioIntDefault, GpioResetPwrGood, diff --git a/src/mainboard/scaleway/tagada/romstage.c b/src/mainboard/scaleway/tagada/romstage.c index c29ff9dff7..630d355785 100644 --- a/src/mainboard/scaleway/tagada/romstage.c +++ b/src/mainboard/scaleway/tagada/romstage.c @@ -31,7 +31,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd); void mainboard_config_gpios(void) { size_t num; - const struct pad_config *table; + const struct dnv_pad_config *table; printk(BIOS_SPEW, "Board Serial: %s.\n", bmcinfo_serial()); /* Configure pads prior to SiliconInit() in case there's any @@ -47,7 +47,7 @@ void mainboard_config_gpios(void) printk(BIOS_INFO, "GPIO table: 0x%x, entry num: 0x%x!\n", (uint32_t)table, (uint32_t)num); - gpio_configure_pads(table, num); + gpio_configure_dnv_pads(table, num); } void mainboard_memory_init_params(FSPM_UPD *mupd) diff --git a/src/soc/intel/denverton_ns/Makefile.inc b/src/soc/intel/denverton_ns/Makefile.inc index 798ca83b9e..712b21c39e 100644 --- a/src/soc/intel/denverton_ns/Makefile.inc +++ b/src/soc/intel/denverton_ns/Makefile.inc @@ -39,7 +39,7 @@ romstage-y += memmap.c romstage-y += reset.c romstage-y += romstage.c romstage-y += tsc_freq.c -romstage-y += gpio.c +romstage-y += gpio_dnv.c romstage-y += soc_util.c romstage-y += spi.c romstage-y += fiamux.c diff --git a/src/soc/intel/denverton_ns/gpio.c b/src/soc/intel/denverton_ns/gpio_dnv.c index 1921b13806..b8576ae357 100644 --- a/src/soc/intel/denverton_ns/gpio.c +++ b/src/soc/intel/denverton_ns/gpio_dnv.c @@ -24,7 +24,7 @@ #include <soc/iomap.h> #include <soc/pcr.h> #include <soc/soc_util.h> -#include <soc/gpio.h> +#include <soc/gpio_dnv.h> // Community PadOwnOffset HostOwnOffset // GpiIsOffset @@ -132,7 +132,7 @@ static void GpioGetPadOwnership(GPIO_PAD GpioPad, GPIO_PAD_OWN *PadOwnVal) *PadOwnVal = (GPIO_PAD_OWN)((PadOwnRegValue & Mask) >> (PadNumber * 4)); } -void gpio_configure_pads(const struct pad_config *gpio, size_t num) +void gpio_configure_dnv_pads(const struct dnv_pad_config *gpio, size_t num) { /* Return if gpio not valid */ if ((gpio == NULL) || (num == 0)) @@ -153,7 +153,7 @@ void gpio_configure_pads(const struct pad_config *gpio, size_t num) GPIO_PAD GpioGroupOffset; uint32_t NumberOfGroups; GPIO_PAD_OWN PadOwnVal; - struct pad_config *GpioData; + struct dnv_pad_config *GpioData; GPIO_PAD Group; uint32_t GroupIndex; uint32_t PadNumber; @@ -180,7 +180,7 @@ void gpio_configure_pads(const struct pad_config *gpio, size_t num) Dw1RegMask = 0; Dw1Reg = 0; - GpioData = (struct pad_config *)&(gpio[Index]); + GpioData = (struct dnv_pad_config *)&(gpio[Index]); Group = GPIO_GET_GROUP_FROM_PAD(GpioData->GpioPad); GroupIndex = GPIO_GET_GROUP_INDEX_FROM_PAD(GpioData->GpioPad); diff --git a/src/soc/intel/denverton_ns/include/soc/gpio.h b/src/soc/intel/denverton_ns/include/soc/gpio_dnv.h index 964b5e0715..c1c1d65e60 100644 --- a/src/soc/intel/denverton_ns/include/soc/gpio.h +++ b/src/soc/intel/denverton_ns/include/soc/gpio_dnv.h @@ -297,13 +297,13 @@ typedef enum { typedef uint32_t GPIO_PAD; -struct pad_config { +struct dnv_pad_config { GPIO_PAD GpioPad; struct GPIO_CONFIG GpioConfig; }; /* Configure GPIOs with mainboard provided settings */ -void gpio_configure_pads(const struct pad_config *gpio, size_t num); +void gpio_configure_dnv_pads(const struct dnv_pad_config *gpio, size_t num); #endif /* __ACPI__ */ #endif /* _DENVERTON_NS_GPIO_H_ */ |