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| author | Jacob Garber <jgarber1@ualberta.ca> | 2019-06-06 11:49:50 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-06-21 08:28:53 +0000 |
| commit | 86d8c4279d9446826f3f6578793baa5eb2156783 (patch) | |
| tree | bec1ba70c568511f9523a31eaef666d53e7f37b2 /src | |
| parent | 532e0c74e15bba27f1b91001e9427c5305f405c8 (diff) | |
| download | coreboot-86d8c4279d9446826f3f6578793baa5eb2156783.tar.xz | |
nb/amd/amdmct/mct_ddr3: Remove duplicate code
This conditional is exactly the same as the one right below it, except
the operations are reorganized slightly.
Change-Id: I00c19a467d23a0736bc2a33b516f97080039e634
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 1347321
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33267
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/northbridge/amd/amdmct/mct_ddr3/mct_d.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c index 5be456695e..945ae8274b 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c @@ -3090,12 +3090,6 @@ void fam15EnableTrainingMode(struct MCTStatStruc *pMCTstat, if (pDCTstat->DIMMValidDCT[0] && pDCTstat->DIMMValidDCT[1] && mctGet_NVbits(NV_Unganged)) interleave_channels = 1; - dword = (Get_NB32_DCT(dev, dct, 0x240) >> 4) & 0xf; - if (dword > 6) - read_odt_delay = dword - 6; - else - read_odt_delay = 0; - dword = Get_NB32_DCT(dev, dct, 0x240); delay = (dword >> 4) & 0xf; if (delay > 6) |