diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2013-10-28 09:54:22 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@google.com> | 2014-02-24 18:42:52 +0100 |
| commit | 8fa6283b8dcf6abe740d60dc1450c07fcf1265de (patch) | |
| tree | ee513554136e49e941086b500a808bdf2a8a3143 /src | |
| parent | eb2eedf6f7d6ac1cff65ed8672701f6efd3b19dd (diff) | |
| download | coreboot-8fa6283b8dcf6abe740d60dc1450c07fcf1265de.tar.xz | |
baytrail: use version 2 of efi wrapper
Version 2 of the efi wrapper wants the speed of the TSC
timer initialized in the parameter structure.
BUG=chrome-os-partner:22866
BRANCH=None
TEST=Built and booted through depthcharge. No errors spit out by
wrapper.
CQ-DEPEND=CL:*147256
Change-Id: I9cd265ea6bde93be85fc6fbc905d83af57fc2773
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174712
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/4903
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/baytrail/baytrail/efi_wrapper.h | 4 | ||||
| -rw-r--r-- | src/soc/intel/baytrail/refcode.c | 2 |
2 files changed, 5 insertions, 1 deletions
diff --git a/src/soc/intel/baytrail/baytrail/efi_wrapper.h b/src/soc/intel/baytrail/baytrail/efi_wrapper.h index 6682f95cfc..3304d03451 100644 --- a/src/soc/intel/baytrail/baytrail/efi_wrapper.h +++ b/src/soc/intel/baytrail/baytrail/efi_wrapper.h @@ -29,7 +29,7 @@ #ifndef __EFI_WRAPPER_H__ #define __EFI_WRAPPER_H__ -#define EFI_WRAPPER_VER 1 +#define EFI_WRAPPER_VER 2 /* Provide generic x86 calling conventions. */ #define ABI_X86 __attribute((regparm(0))) @@ -44,6 +44,8 @@ struct efi_wrapper_params { int version; void ABI_X86 (*console_out)(unsigned char byte); + + unsigned int tsc_ticks_per_microsecond; } __attribute__((packed)); typedef int ABI_X86 (*efi_wrapper_entry_t)(struct efi_wrapper_params *); diff --git a/src/soc/intel/baytrail/refcode.c b/src/soc/intel/baytrail/refcode.c index 1d88ef7eb9..9b5aa6790e 100644 --- a/src/soc/intel/baytrail/refcode.c +++ b/src/soc/intel/baytrail/refcode.c @@ -19,6 +19,7 @@ #include <cbmem.h> #include <console/console.h> +#include <cpu/x86/tsc.h> #include <rmodule.h> #include <baytrail/ramstage.h> @@ -47,6 +48,7 @@ void baytrail_run_reference_code(void) return; } + wrp.tsc_ticks_per_microsecond = tsc_freq_mhz(); entry = refcode.entry; /* Call into reference code. */ |