diff options
author | Andrey Petrov <anpetrov@fb.com> | 2019-09-10 11:14:00 -0700 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2019-09-21 20:36:01 +0000 |
commit | 91f955e31f0490933b32087bdd52840aa8cf0692 (patch) | |
tree | da9bf65a5486fffac9f30d94304799e7231b4cb0 /src | |
parent | 65562cd654e3cd35ca953cfee51a1d7728e21d80 (diff) | |
download | coreboot-91f955e31f0490933b32087bdd52840aa8cf0692.tar.xz |
soc/fsp_broadwell_de: Use DIMM numbers relative to channel
Currently "DIMM numbers" increase monotonically for all the channels. However,
commonly DIMMS are numerated on per-channel basis. This change makes numeration
match the convention.
TEST=on OCP monolake, run dmidecode tool and see that "Locator" field matches
expectation.
Change-Id: I3e7858545471867a0210e1b9ef646529b8e2a31c
Signed-off-by: Andrey Petrov <anpetrov@fb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35318
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/soc/intel/fsp_broadwell_de/romstage/memory.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/fsp_broadwell_de/romstage/memory.c b/src/soc/intel/fsp_broadwell_de/romstage/memory.c index 7574c5fb66..afbf97bf57 100644 --- a/src/soc/intel/fsp_broadwell_de/romstage/memory.c +++ b/src/soc/intel/fsp_broadwell_de/romstage/memory.c @@ -54,7 +54,7 @@ void save_dimm_info(void) dimm_attr dimm = {0}; u8 *spd_data = blk.spd_array[index]; if (spd_decode_ddr4(&dimm, spd_data) == SPD_STATUS_OK) - spd_add_smbios17_ddr4(channel, index, dclk_mhz, &dimm); + spd_add_smbios17_ddr4(channel, slot, dclk_mhz, &dimm); index++; } } |