diff options
| author | Furquan Shaikh <furquan@google.com> | 2015-04-09 08:21:01 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-22 09:02:25 +0200 |
| commit | 97a20caa5300c187c85cdedbeb84eb3c59849793 (patch) | |
| tree | a82358f2b84d130ff2bcc8361f8c249031750471 /src | |
| parent | 6e41523e70b40c92b05c4d52a2b0ddb276e76921 (diff) | |
| download | coreboot-97a20caa5300c187c85cdedbeb84eb3c59849793.tar.xz | |
armv8/secmon: Correct names for SMC macros
We support SMC32 calls from AARCH64, however we do not support SMC32
calls from AARCH32. Reflect this policy in the code by using
appropriate names for exception type check in SMC handler.
BUG=None
BRANCH=None
TEST=Compiles successfully and able to turn CPU1 on and off using psci commands.
Change-Id: Ifc3c9e2fe0c4e6e395f2647769a2d07f5f41f57f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: cbaf712c2c45273a9eb0b0808a0d4d0630023fdd
Original-Change-Id: I133b2c0bbc4968401a028382532bd051d6298802
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/265621
Original-Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9924
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/arm64/armv8/secmon/smc.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/src/arch/arm64/armv8/secmon/smc.c b/src/arch/arm64/armv8/secmon/smc.c index ae0f130179..35f38c15d1 100644 --- a/src/arch/arm64/armv8/secmon/smc.c +++ b/src/arch/arm64/armv8/secmon/smc.c @@ -26,8 +26,10 @@ #include <console/console.h> enum { - EC_SMC32 = 0x13, - EC_SMC64 = 0x17, + /* SMC called from AARCH32 */ + EC_SMC_AARCH32 = 0x13, + /* SMC called from AARCH64 */ + EC_SMC_AARCH64 = 0x17, SMC_NUM_RANGES = 8, }; @@ -109,12 +111,12 @@ static int smc_handler(struct exc_state *state, uint64_t vector_id) esr = raw_read_esr_el3(); exception_class = (esr >> 26) & 0x3f; - /* No support for 32-bit SMC calls. */ - if (exception_class == EC_SMC32) + /* No support for SMC calls from AARCH32 */ + if (exception_class == EC_SMC_AARCH32) return smc_return_with_error(state, smc); - /* Check to ensure this is an SMC from aarch64. */ - if (exception_class != EC_SMC64) + /* Check to ensure this is an SMC from AARCH64. */ + if (exception_class != EC_SMC_AARCH64) return EXC_RET_IGNORED; /* Ensure immediate value is 0. */ |