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author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-11-22 23:40:29 +0100 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-11-23 17:16:45 +0100 |
commit | 991f18475c951dcd728eb8550b10dd62938b1770 (patch) | |
tree | 0b379c255f583f6a389dbffc5adbd935fc84fb43 /src | |
parent | baa1acde7bb46a06e34404796aeaa1d5c7c6ec47 (diff) | |
download | coreboot-991f18475c951dcd728eb8550b10dd62938b1770.tar.xz |
cpu/amd: de-duplicate MSR include files
Change-Id: I8e01a4ab68b463efe02c27f589e0b4b719532eb5
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12510
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src')
-rw-r--r-- | src/cpu/amd/dualcore/amd_sibling.c | 2 | ||||
-rw-r--r-- | src/cpu/amd/dualcore/dualcore_id.c | 2 | ||||
-rw-r--r-- | src/cpu/amd/family_10h-family_15h/model_10xxx_init.c | 2 | ||||
-rw-r--r-- | src/cpu/amd/family_10h-family_15h/monotonic_timer.c | 2 | ||||
-rw-r--r-- | src/cpu/amd/model_fxx/model_fxx_init.c | 2 | ||||
-rw-r--r-- | src/cpu/amd/quadcore/amd_sibling.c | 2 | ||||
-rw-r--r-- | src/cpu/amd/quadcore/quadcore_id.c | 2 | ||||
-rw-r--r-- | src/cpu/amd/smm/smm_init.c | 2 | ||||
-rw-r--r-- | src/include/cpu/amd/model_fxx_msr.h | 25 | ||||
-rw-r--r-- | src/include/cpu/amd/msr.h (renamed from src/include/cpu/amd/model_10xxx_msr.h) | 6 | ||||
-rw-r--r-- | src/northbridge/amd/amdfam10/northbridge.c | 2 |
11 files changed, 12 insertions, 37 deletions
diff --git a/src/cpu/amd/dualcore/amd_sibling.c b/src/cpu/amd/dualcore/amd_sibling.c index d9942de410..e1d4d2e0e2 100644 --- a/src/cpu/amd/dualcore/amd_sibling.c +++ b/src/cpu/amd/dualcore/amd_sibling.c @@ -9,7 +9,7 @@ #include <pc80/mc146818rtc.h> #include <smp/spinlock.h> #include <cpu/x86/mtrr.h> -#include <cpu/amd/model_fxx_msr.h> +#include <cpu/amd/msr.h> #include <cpu/amd/model_fxx_rev.h> #include <cpu/amd/amdk8_sysconf.h> diff --git a/src/cpu/amd/dualcore/dualcore_id.c b/src/cpu/amd/dualcore/dualcore_id.c index ba92396731..4fcedae0b1 100644 --- a/src/cpu/amd/dualcore/dualcore_id.c +++ b/src/cpu/amd/dualcore/dualcore_id.c @@ -3,7 +3,7 @@ #include <arch/cpu.h> #include <cpu/amd/multicore.h> #ifdef __PRE_RAM__ -#include <cpu/amd/model_fxx_msr.h> +#include <cpu/amd/msr.h> #endif //called by bus_cpu_scan too diff --git a/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c b/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c index fe9fb9cd0c..153fb10fff 100644 --- a/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c +++ b/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c @@ -31,7 +31,7 @@ #include <cpu/x86/cache.h> #include <cpu/x86/mtrr.h> #include <cpu/amd/multicore.h> -#include <cpu/amd/model_10xxx_msr.h> +#include <cpu/amd/msr.h> #define MCI_STATUS 0x401 diff --git a/src/cpu/amd/family_10h-family_15h/monotonic_timer.c b/src/cpu/amd/family_10h-family_15h/monotonic_timer.c index 53b4c30145..6bf046dedc 100644 --- a/src/cpu/amd/family_10h-family_15h/monotonic_timer.c +++ b/src/cpu/amd/family_10h-family_15h/monotonic_timer.c @@ -21,7 +21,7 @@ #include <device/pci_ids.h> #include <northbridge/amd/amdht/AsPsDefs.h> -#include <cpu/amd/model_10xxx_msr.h> +#include <cpu/amd/msr.h> static struct monotonic_counter { int initialized; diff --git a/src/cpu/amd/model_fxx/model_fxx_init.c b/src/cpu/amd/model_fxx/model_fxx_init.c index 93fa07f961..1ef195d05c 100644 --- a/src/cpu/amd/model_fxx/model_fxx_init.c +++ b/src/cpu/amd/model_fxx/model_fxx_init.c @@ -26,7 +26,7 @@ #include <cpu/x86/mtrr.h> #include <cpu/x86/smm.h> #include <cpu/amd/multicore.h> -#include <cpu/amd/model_fxx_msr.h> +#include <cpu/amd/msr.h> #if CONFIG_WAIT_BEFORE_CPUS_INIT void cpus_ready_for_init(void) diff --git a/src/cpu/amd/quadcore/amd_sibling.c b/src/cpu/amd/quadcore/amd_sibling.c index dc3cdbba21..397a3ddb96 100644 --- a/src/cpu/amd/quadcore/amd_sibling.c +++ b/src/cpu/amd/quadcore/amd_sibling.c @@ -22,7 +22,7 @@ #include <pc80/mc146818rtc.h> #include <smp/spinlock.h> #include <cpu/x86/mtrr.h> -#include <cpu/amd/model_10xxx_msr.h> +#include <cpu/amd/msr.h> #include <cpu/amd/model_10xxx_rev.h> #include <cpu/amd/amdfam10_sysconf.h> diff --git a/src/cpu/amd/quadcore/quadcore_id.c b/src/cpu/amd/quadcore/quadcore_id.c index 99e6d68be4..b89aac7e65 100644 --- a/src/cpu/amd/quadcore/quadcore_id.c +++ b/src/cpu/amd/quadcore/quadcore_id.c @@ -18,7 +18,7 @@ #include <arch/cpu.h> #include <cpu/amd/multicore.h> #ifdef __PRE_RAM__ -#include <cpu/amd/model_10xxx_msr.h> +#include <cpu/amd/msr.h> #endif //called by bus_cpu_scan too diff --git a/src/cpu/amd/smm/smm_init.c b/src/cpu/amd/smm/smm_init.c index fa81941cf9..c87b70109f 100644 --- a/src/cpu/amd/smm/smm_init.c +++ b/src/cpu/amd/smm/smm_init.c @@ -21,7 +21,7 @@ #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> #include <cpu/amd/mtrr.h> -#include <cpu/amd/model_fxx_msr.h> +#include <cpu/amd/msr.h> #include <cpu/x86/cache.h> #include <cpu/x86/smm.h> #include <string.h> diff --git a/src/include/cpu/amd/model_fxx_msr.h b/src/include/cpu/amd/model_fxx_msr.h deleted file mode 100644 index 2ac2d4eb84..0000000000 --- a/src/include/cpu/amd/model_fxx_msr.h +++ /dev/null @@ -1,25 +0,0 @@ -#ifndef CPU_AMD_MODEL_FXX_MSR_H -#define CPU_AMD_MODEL_FXX_MSR_H - -#define SMM_BASE_MSR 0xc0010111 -#define SMM_ADDR_MSR 0xc0010112 -#define SMM_MASK_MSR 0xc0010113 - -#define HWCR_MSR 0xC0010015 -#define NB_CFG_MSR 0xC001001f -#define LS_CFG_MSR 0xC0011020 -#define IC_CFG_MSR 0xC0011021 -#define DC_CFG_MSR 0xC0011022 -#define BU_CFG_MSR 0xC0011023 - - -#define CPU_ID_FEATURES_MSR 0xc0011004 - -/* D0 only */ -#define CPU_ID_HYPER_EXT_FEATURES 0xc001100d -/* E0 only */ -#define LOGICAL_CPUS_NUM_MSR 0xc001100d - -#define CPU_ID_EXT_FEATURES_MSR 0xc0011005 - -#endif /* CPU_AMD_MODEL_FXX_MSR_H */ diff --git a/src/include/cpu/amd/model_10xxx_msr.h b/src/include/cpu/amd/msr.h index 5faf587929..31af3e6e92 100644 --- a/src/include/cpu/amd/model_10xxx_msr.h +++ b/src/include/cpu/amd/msr.h @@ -14,8 +14,8 @@ * GNU General Public License for more details. */ -#ifndef CPU_AMD_MODEL_10XXX_MSR_H -#define CPU_AMD_MODEL_10XXX_MSR_H +#ifndef CPU_AMD_MSR_H +#define CPU_AMD_MSR_H #include <cpu/x86/msr.h> @@ -42,4 +42,4 @@ #define LOGICAL_CPUS_NUM_MSR 0xC001100d #define CPU_ID_EXT_FEATURES_MSR 0xC0011005 -#endif /* CPU_AMD_MODEL_10XXX_MSR_H */ +#endif /* CPU_AMD_MSR_H */ diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index 4826a36213..17dabae983 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -32,7 +32,7 @@ #include <cpu/x86/cache.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdfam10_sysconf.h> -#include <cpu/amd/model_10xxx_msr.h> +#include <cpu/amd/msr.h> #include <cpu/amd/family_10h-family_15h/ram_calc.h> #if CONFIG_LOGICAL_CPUS |