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author | Bora Guvendik <bora.guvendik@intel.com> | 2017-11-01 12:47:55 -0700 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2017-11-06 18:21:20 +0000 |
commit | b202a01acd9617a37ed465a9b759128683d1fdf0 (patch) | |
tree | 9f5f69bd113e7c9fe463e80304a6e4ba75db01bf /src | |
parent | 4239a1671c9bca92f7dc636c09eb73280bfc98de (diff) | |
download | coreboot-b202a01acd9617a37ed465a9b759128683d1fdf0.tar.xz |
intel/cannonlake_rvp: enable CNVi bluetooth
Enable USB2 port 10 for CNVi bluetooth.
TEST=Boot to OS, verify bluetooth functionality.
Change-Id: I5f2390c149bf0de911efac09f54ccd641f51bbcd
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/22290
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb index 80b4c43943..ca46d36f32 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb +++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb @@ -21,7 +21,7 @@ chip soc/intel/cannonlake register "usb2_ports[6]" = "USB2_PORT_EMPTY" register "usb2_ports[7]" = "USB2_PORT_EMPTY" register "usb2_ports[8]" = "USB2_PORT_EMPTY" - register "usb2_ports[9]" = "USB2_PORT_EMPTY" + register "usb2_ports[9]" = "USB2_PORT_MID(OC0)" register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC0)" |