diff options
author | Martin Roth <martinroth@google.com> | 2018-09-07 11:28:52 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2018-09-09 16:18:25 +0000 |
commit | c4b0fd0a86db280ad1a8d8572218dc42fd5bb7e4 (patch) | |
tree | 4eccd8bfb92999e445965ea4be1444aae7d7fa2e /src | |
parent | 41979d862a972375d6800afdf2b8b52d408fd220 (diff) | |
download | coreboot-c4b0fd0a86db280ad1a8d8572218dc42fd5bb7e4.tar.xz |
mainboard/google/kahlee: Reset trackpad & touchscreen
AMD chips don't hold off a reset to the end of I2C transitions, so
devices on the i2c bus can be left in a bad state. To avoid this,
make sure the trackpad and touchscreen chips get disabled
during boot.
BUG=b:114411165
TEST=build, reboot watch trackpad enable go low
Change-Id: Ie50f4a102249df79517da571a6e768dba804cd57
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/28538
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/google/kahlee/variants/baseboard/gpio.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mainboard/google/kahlee/variants/baseboard/gpio.c b/src/mainboard/google/kahlee/variants/baseboard/gpio.c index 66d5c99bd2..75a8ab5e3f 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/gpio.c +++ b/src/mainboard/google/kahlee/variants/baseboard/gpio.c @@ -40,6 +40,10 @@ static const struct soc_amd_gpio gpio_set_stage_reset[] = { /* GPIO_15 - EC_IN_RW_OD */ PAD_GPI(GPIO_15, PULL_UP), + /* GPIO_12 - EN_PP3300_TRACKPAD */ + /* Init low to reset the chip */ + PAD_GPO(GPIO_12, LOW), + /* GPIO_22 - EC_SCI_ODL, SCI */ PAD_SCI(GPIO_22, PULL_UP, EDGE_LOW), @@ -58,6 +62,10 @@ static const struct soc_amd_gpio gpio_set_stage_reset[] = { /* GPIO_74 - LPC_CLK0_EC_R */ PAD_NF(GPIO_74, LPCCLK0, PULL_DOWN), + /* GPIO_76 - EN_PP3300_TOUCHSCREEN */ + /* Init low to reset the chip */ + PAD_GPO(GPIO_76, LOW), + /* GPIO_92 - WLAN_PCIE_CLKREQ_3V3_ODL */ PAD_NF(GPIO_92, CLK_REQ0_L, PULL_UP), |