diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2019-02-22 01:14:23 +0000 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2019-02-22 03:00:30 +0000 |
| commit | c98e36fec5c776d022118cdfdd026cdce7053771 (patch) | |
| tree | b95afd267ce74907689b2da62807e4cc71b56113 /src | |
| parent | 4323175818bae89c92ae8035efafebcacde831e9 (diff) | |
| download | coreboot-c98e36fec5c776d022118cdfdd026cdce7053771.tar.xz | |
Revert "src/drivers/intel/wifi: Add a W/A for Intel ThP2 9260"
This reverts commit 3afb84a24583f5dee9fb407f11b32253d59392bf.
Reason for revert: This is causing issues with the PCIe link
and the system is unable to enter S0ix. Until it can be fixed
in coreboot revert the change here that is not working properly.
BUG=b:124264120
Change-Id: Ia20da9ab560ca35950b4a916667f51e0f541b382
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/31559
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Caveh Jalali <caveh@google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/drivers/intel/wifi/wifi.c | 25 |
1 files changed, 0 insertions, 25 deletions
diff --git a/src/drivers/intel/wifi/wifi.c b/src/drivers/intel/wifi/wifi.c index 416b04b909..ade5087db1 100644 --- a/src/drivers/intel/wifi/wifi.c +++ b/src/drivers/intel/wifi/wifi.c @@ -255,34 +255,9 @@ static const char *intel_wifi_acpi_name(const struct device *dev) } #endif -static void pci_dev_apply_quirks(struct device *dev) -{ - unsigned int cap; - uint16_t val; - struct device *root = dev->bus->dev; - - switch (dev->device) { - case PCI_DEVICE_ID_TP_9260_SERIES_WIFI: - cap = pci_find_capability(root, PCI_CAP_ID_PCIE); - /* Check the LTR for root port and enable it */ - if (cap) { - val = pci_read_config16(root, cap + - PCI_EXP_DEV_CAP2_OFFSET); - if (val & LTR_MECHANISM_SUPPORT) { - val = pci_read_config16(root, cap + - PCI_EXP_DEV_CTL_STS2_CAP_OFFSET); - val |= LTR_MECHANISM_EN; - pci_write_config16(root, cap + - PCI_EXP_DEV_CTL_STS2_CAP_OFFSET, val); - } - } - } -} - static void wifi_pci_dev_init(struct device *dev) { pci_dev_init(dev); - pci_dev_apply_quirks(dev); if (IS_ENABLED(CONFIG_ELOG)) { uint32_t val; |