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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-07-07 18:16:55 +0300 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-07-14 19:49:32 +0200 |
commit | d005f78d292f65506debb5546f085657f3e80237 (patch) | |
tree | eb02dc9768610ac5c44e3e0027f3192b69ec9c79 /src | |
parent | b6f3da4ddcd306b8039743f1101d41b648e0194d (diff) | |
download | coreboot-d005f78d292f65506debb5546f085657f3e80237.tar.xz |
AGESA fam15: Fix entry to cimx/sb900
Move SB900 call to match comments and changes already made for
family14 et al.
Change-Id: I22aa0bbeeabf9cff929c49c23014005bc3d53ccb
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6238
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/cpu/amd/agesa/amd_late_init.c | 3 | ||||
-rw-r--r-- | src/northbridge/amd/agesa/family15/northbridge.c | 5 | ||||
-rw-r--r-- | src/southbridge/amd/cimx/sb700/sb_cimx.h | 1 |
3 files changed, 5 insertions, 4 deletions
diff --git a/src/cpu/amd/agesa/amd_late_init.c b/src/cpu/amd/agesa/amd_late_init.c index 83e9ed83cb..0453006b0f 100644 --- a/src/cpu/amd/agesa/amd_late_init.c +++ b/src/cpu/amd/agesa/amd_late_init.c @@ -40,9 +40,6 @@ static void agesawrapper_post_device(void *unused) /* Preparation for write_tables(). */ get_bus_conf(); -#if CONFIG_AMD_SB_CIMX && CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY15 - sb_After_Pci_Init(); -#endif #if CONFIG_AMD_SB_CIMX sb_Late_Post(); #endif diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c index 34f58d33a2..34d7ea3765 100644 --- a/src/northbridge/amd/agesa/family15/northbridge.c +++ b/src/northbridge/amd/agesa/family15/northbridge.c @@ -42,6 +42,7 @@ #include "agesawrapper.h" #include <northbridge/amd/agesa/agesawrapper_call.h> #include "northbridge.h" +#include "sb_cimx.h" #define MAX_NODE_NUMS (MAX_NODES * MAX_DIES) @@ -591,6 +592,10 @@ static void domain_enable_resources(device_t dev) { /* Must be called after PCI enumeration and resource allocation */ printk(BIOS_DEBUG, "\nFam15 - %s: AmdInitMid.\n", __func__); + +#if CONFIG_AMD_SB_CIMX + sb_After_Pci_Init(); +#endif AGESAWRAPPER(amdinitmid); printk(BIOS_DEBUG, " Fam15 - leaving %s.\n", __func__); } diff --git a/src/southbridge/amd/cimx/sb700/sb_cimx.h b/src/southbridge/amd/cimx/sb700/sb_cimx.h index ebfaca895d..b123c51602 100644 --- a/src/southbridge/amd/cimx/sb700/sb_cimx.h +++ b/src/southbridge/amd/cimx/sb700/sb_cimx.h @@ -34,7 +34,6 @@ void sb_Poweron_Init(void); void sb_Before_Pci_Init(void); void sb_After_Pci_Init(void); -void sb_Mid_Post_Init(void); void sb_Late_Post(void); void sb7xx_51xx_enable_wideio(u8 wio_index, u16 base); |