diff options
| author | huang lin <hl@rock-chips.com> | 2014-10-31 16:40:42 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-10 11:58:18 +0200 |
| commit | d1bdef008a33e4e9583606feb8747a4d0d249ef1 (patch) | |
| tree | 8e63164cda0d74dff50b1e16fe18ad9080eff66c /src | |
| parent | c06a962271053d1fbb280e28e1cd5788132d942c (diff) | |
| download | coreboot-d1bdef008a33e4e9583606feb8747a4d0d249ef1.tar.xz | |
rk3288: slowly raise to max cpu voltage to prevent overshoot
slowly raise to max cpu voltage to prevent overshoot,
and in our experience,when cpu run in 1.8GHz,the
vdd_cpu must up to 1.4V
BUG=chrome-os-partner:32716, chrome-os-partner:31896
TEST=Boot on veyron_pinky rev2,check the rk808 buck1 voltage 1400mv
and measure the overshoot is 1440mv
Change-Id: I759840bd8cf57a5589bf1862d04803f80f804164
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 567f616ff091883ed3275b407859c9399db981b2
Original-Change-Id: I9bb739b49ae4b4f7a60133fa38b0fe51b95c0d78
Original-Signed-off-by: huang lin <hl@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/226753
Original-Reviewed-by: Doug Anderson <dianders@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/9408
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/veyron_pinky/bootblock.c | 13 | ||||
| -rw-r--r-- | src/soc/rockchip/rk3288/rk808.c | 1 |
2 files changed, 11 insertions, 3 deletions
diff --git a/src/mainboard/google/veyron_pinky/bootblock.c b/src/mainboard/google/veyron_pinky/bootblock.c index b34199dfe5..99719c4024 100644 --- a/src/mainboard/google/veyron_pinky/bootblock.c +++ b/src/mainboard/google/veyron_pinky/bootblock.c @@ -27,16 +27,25 @@ #include <soc/rk808.h> #include <soc/spi.h> #include <vendorcode/google/chromeos/chromeos.h> +#include <delay.h> #include "board.h" void bootblock_mainboard_init(void) { - /* cpu frequency will up to 1.8GHz, so the buck1 must up to 1.3v */ + /* cpu frequency will up to 1.8GHz, + * in our experience the buck1 + * must up to 1.4v + */ setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL); setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA); i2c_init(PMIC_BUS, 400*KHz); - rk808_configure_buck(PMIC_BUS, 1, 1300); + + /* Slowly raise to max CPU voltage to prevent overshoot */ + rk808_configure_buck(PMIC_BUS, 1, 1200); + udelay(175);/* Must wait for voltage to stabilize,2mV/us */ + rk808_configure_buck(PMIC_BUS, 1, 1400); + udelay(100);/* Must wait for voltage to stabilize,2mV/us */ rkclk_configure_cpu(); /* i2c1 for tpm */ diff --git a/src/soc/rockchip/rk3288/rk808.c b/src/soc/rockchip/rk3288/rk808.c index aa39b8d5ee..fea64e5ebe 100644 --- a/src/soc/rockchip/rk3288/rk808.c +++ b/src/soc/rockchip/rk3288/rk808.c @@ -98,5 +98,4 @@ void rk808_configure_buck(uint8_t bus, int buck, int millivolts) } rk808_clrsetbits(bus, buck_reg, 0x3f, vsel); rk808_clrsetbits(bus, DCDC_EN, 0, 1 << (buck - 1)); - udelay(225);/* Must wait for voltage to stabilize */ } |