summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorRichard Spiegel <richard.spiegel@amd.corp-partner.google.com>2018-08-13 19:35:41 -0700
committerMartin Roth <martinroth@google.com>2018-08-15 18:32:35 +0000
commitd8b34e41dcf291ea517cd4749b111efee8307665 (patch)
treed4d300d0e87155da18c69a536609a129441c86c9 /src
parentc26c93887ab5ec47249ed14dfbff1acbaf530e0c (diff)
downloadcoreboot-d8b34e41dcf291ea517cd4749b111efee8307665.tar.xz
vendorcode/amd/pi/00670F00: Remove functions that use LibAmdPciRMW()
The functions that use LibAmdPciRMW() are not used by coreboot and can be safely removed in preparation to remove LibAmdPciRMW() itself. The functions to be removed are: From vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchPeLib.c: ProgramPciByteTable(). From vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchLib.c: RwXhciIndReg(), RwXhci0IndReg() and RwXhci1IndReg(). From vendorcode/amd/pi/00670F00/Proc/Fch/Common/PciLib.c: RwPci(). BUG=b:112541697 TEST=Build grunt and gardenia Change-Id: I0b96d3d6b98140ed8e9298817dbe29d55b9e22cb Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/28082 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h5
-rw-r--r--src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchLib.c63
-rw-r--r--src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchPeLib.c46
-rw-r--r--src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/PciLib.c19
4 files changed, 0 insertions, 133 deletions
diff --git a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h
index 3f4bccfe4c..aa11396550 100644
--- a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h
+++ b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h
@@ -55,8 +55,6 @@ VOID WriteMem (IN UINT32 Address, IN UINT8 OpFlag, IN VOID *ValuePtr);
VOID RwMem (IN UINT32 Address, IN UINT8 OpFlag, IN UINT32 Mask, IN UINT32 Data);
VOID ReadPci (IN UINT32 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
VOID WritePci (IN UINT32 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID RwPci (IN UINT32 Address, IN UINT8 OpFlag, IN UINT32 Mask, IN UINT32 Data, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID ProgramPciByteTable (IN REG8_MASK* pPciByteTable, IN UINT16 dwTableSize, IN AMD_CONFIG_PARAMS *StdHeader);
VOID ProgramFchSciMapTbl (IN SCI_MAP_CONTROL *pSciMapTbl, IN FCH_RESET_DATA_BLOCK *FchResetDataBlock);
VOID ProgramFchGpioTbl (IN GPIO_CONTROL *pGpioTbl);
VOID ProgramFchSataPhyTbl (IN SATA_PHY_CONTROL *pSataPhyTbl, IN FCH_RESET_DATA_BLOCK *FchResetDataBlock);
@@ -346,9 +344,6 @@ VOID TurnOffCG2 (OUT VOID);
VOID BackUpCG2 (OUT VOID);
VOID FchCopyMem (IN VOID* pDest, IN VOID* pSource, IN UINTN Length);
VOID* GetRomSigPtr (IN UINTN* RomSigPtr, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID RwXhciIndReg (IN UINT32 Index, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID RwXhci0IndReg (IN UINT32 Index, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);
-VOID RwXhci1IndReg (IN UINT32 Index, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);
VOID ReadXhci0Phy (IN UINT32 Port, IN UINT32 Address, IN UINT32 *Value, IN AMD_CONFIG_PARAMS *StdHeader);
VOID ReadXhci1Phy (IN UINT32 Port, IN UINT32 Address, IN UINT32 *Value, IN AMD_CONFIG_PARAMS *StdHeader);
VOID AcLossControl (IN UINT8 AcLossControlValue);
diff --git a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchLib.c b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchLib.c
index 37880b409e..2c2b688154 100644
--- a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchLib.c
+++ b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchLib.c
@@ -192,69 +192,6 @@ GetRomSigPtr (
return RomSigPtr;
}
-/** RwXhciIndReg - Reserved **/
-VOID
-RwXhciIndReg (
- IN UINT32 Index,
- IN UINT32 AndMask,
- IN UINT32 OrMask,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 RevReg;
- PCI_ADDR PciAddress;
-
- PciAddress.AddressValue = (USB_XHCI_BUS_DEV_FUN << 12) + 0x48;
- LibAmdPciWrite (AccessWidth32, PciAddress, &Index, StdHeader);
- PciAddress.AddressValue = (USB_XHCI_BUS_DEV_FUN << 12) + 0x4C;
- RevReg = ~AndMask;
- LibAmdPciRMW (AccessWidth32, PciAddress, &OrMask, &RevReg, StdHeader);
-
- PciAddress.AddressValue = (USB_XHCI1_BUS_DEV_FUN << 12) + 0x48;
- LibAmdPciWrite (AccessWidth32, PciAddress, &Index, StdHeader);
- PciAddress.AddressValue = (USB_XHCI1_BUS_DEV_FUN << 12) + 0x4C;
- RevReg = ~AndMask;
- LibAmdPciRMW (AccessWidth32, PciAddress, &OrMask, &RevReg, StdHeader);
-}
-
-/** RwXhci0IndReg - Reserved **/
-VOID
-RwXhci0IndReg (
- IN UINT32 Index,
- IN UINT32 AndMask,
- IN UINT32 OrMask,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 RevReg;
- PCI_ADDR PciAddress;
-
- PciAddress.AddressValue = (USB_XHCI_BUS_DEV_FUN << 12) + 0x48;
- LibAmdPciWrite (AccessWidth32, PciAddress, &Index, StdHeader);
- PciAddress.AddressValue = (USB_XHCI_BUS_DEV_FUN << 12) + 0x4C;
- RevReg = ~AndMask;
- LibAmdPciRMW (AccessWidth32, PciAddress, &OrMask, &RevReg, StdHeader);
-}
-
-/** RwXhci1IndReg - Reserved **/
-VOID
-RwXhci1IndReg (
- IN UINT32 Index,
- IN UINT32 AndMask,
- IN UINT32 OrMask,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT32 RevReg;
- PCI_ADDR PciAddress;
-
- PciAddress.AddressValue = (USB_XHCI1_BUS_DEV_FUN << 12) + 0x48;
- LibAmdPciWrite (AccessWidth32, PciAddress, &Index, StdHeader);
- PciAddress.AddressValue = (USB_XHCI1_BUS_DEV_FUN << 12) + 0x4C;
- RevReg = ~AndMask;
- LibAmdPciRMW (AccessWidth32, PciAddress, &OrMask, &RevReg, StdHeader);
-}
-
/** ReadXhci0Phy - Reserved **/
VOID
ReadXhci0Phy (
diff --git a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchPeLib.c b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchPeLib.c
index ae02aec9cc..1df709c437 100644
--- a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchPeLib.c
+++ b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchPeLib.c
@@ -55,52 +55,6 @@
#if IS_ENABLED(CONFIG_VENDORCODE_FULL_SUPPORT)
/*----------------------------------------------------------------------------------------*/
/**
- * ProgramPciByteTable - Program PCI register by table (8 bits data)
- *
- *
- *
- * @param[in] pPciByteTable - Table data pointer
- * @param[in] dwTableSize - Table length
- * @param[in] StdHeader
- *
- */
-VOID
-ProgramPciByteTable (
- IN REG8_MASK *pPciByteTable,
- IN UINT16 dwTableSize,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- UINT8 i;
- UINT8 dbBusNo;
- UINT8 dbDevFnNo;
- UINT8 Or8;
- UINT8 Mask8;
- PCI_ADDR PciAddress;
-
- dbBusNo = pPciByteTable->RegIndex;
- dbDevFnNo = pPciByteTable->AndMask;
- pPciByteTable++;
-
- for ( i = 1; i < dwTableSize; i++ ) {
- if ( (pPciByteTable->RegIndex == 0xFF) && (pPciByteTable->AndMask == 0xFF) && (pPciByteTable->OrMask == 0xFF) ) {
- pPciByteTable++;
- dbBusNo = pPciByteTable->RegIndex;
- dbDevFnNo = pPciByteTable->AndMask;
- pPciByteTable++;
- i++;
- } else {
- PciAddress.AddressValue = (dbBusNo << 20) + (dbDevFnNo << 12) + pPciByteTable->RegIndex;
- Or8 = pPciByteTable->OrMask;
- Mask8 = ~pPciByteTable->AndMask;
- LibAmdPciRMW (AccessWidth8, PciAddress, &Or8, &Mask8, StdHeader);
- pPciByteTable++;
- }
- }
-}
-
-/*----------------------------------------------------------------------------------------*/
-/**
* ProgramFchSciMapTbl - Program FCH SCI Map table (8 bits data)
*
*
diff --git a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/PciLib.c b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/PciLib.c
index 7c55c4e7ef..136353eef9 100644
--- a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/PciLib.c
+++ b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/PciLib.c
@@ -72,22 +72,3 @@ WritePci (
LibAmdPciWrite ((ACCESS_WIDTH) OpFlag, PciAddress, Value, StdHeader);
}
-
-VOID
-RwPci (
- IN UINT32 Address,
- IN UINT8 OpFlag,
- IN UINT32 Mask,
- IN UINT32 Data,
- IN AMD_CONFIG_PARAMS *StdHeader
- )
-{
- PCI_ADDR PciAddress;
- UINT32 rMask;
-
- PciAddress.AddressValue = ((Address >> 4) & ~0xFFF) + (Address & 0xFFF);
- rMask = ~Mask;
- LibAmdPciRMW ((ACCESS_WIDTH) OpFlag, PciAddress, &Data, &rMask, StdHeader);
-}
-
-