diff options
| author | Richard Spiegel <richard.spiegel@amd.corp-partner.google.com> | 2018-10-11 08:15:43 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-10-11 21:04:10 +0000 |
| commit | de5d04011cb2f3de4e93381d58a4d01d5682a3f9 (patch) | |
| tree | c95e5b9f657ef1a0807c536b90b8e32e1468e806 /src | |
| parent | f9735dc760e11136fb0a1623b3ec5a51399d3cab (diff) | |
| download | coreboot-de5d04011cb2f3de4e93381d58a4d01d5682a3f9.tar.xz | |
amd/stoneyridge: Indicate STAPM units in their name
STAPM devicetree registers do not indicate the unit, which causes confusion.
More importantly, the time was assumed to be in seconds when it's actually
milliseconds. This caused early STAPM configurations to fail.
BUG=b:117590953
TEST=Build grunt
Change-Id: I2a7e3d43601992d1f7b02456913c763d940fe9ee
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/29035
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/kahlee/variants/careena/devicetree.cb | 4 | ||||
| -rw-r--r-- | src/mainboard/google/kahlee/variants/grunt/devicetree.cb | 4 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/chip.h | 4 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/romstage.c | 9 |
4 files changed, 11 insertions, 10 deletions
diff --git a/src/mainboard/google/kahlee/variants/careena/devicetree.cb b/src/mainboard/google/kahlee/variants/careena/devicetree.cb index ad760b53e3..b541c0305e 100644 --- a/src/mainboard/google/kahlee/variants/careena/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/careena/devicetree.cb @@ -21,8 +21,8 @@ chip soc/amd/stoneyridge register "uma_mode" = "UMAMODE_SPECIFIED_SIZE" register "uma_size" = "32 * MiB" register "stapm_percent" = "68" - register "stapm_time" = "2500000" - register "stapm_power" = "7800" + register "stapm_time_ms" = "2500000" + register "stapm_power_mw" = "7800" # Enable I2C0 for audio, USB3 hub at 400kHz register "i2c[0]" = "{ diff --git a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb index 8af3f9c356..5a8906b3b1 100644 --- a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb @@ -21,8 +21,8 @@ chip soc/amd/stoneyridge register "uma_mode" = "UMAMODE_SPECIFIED_SIZE" register "uma_size" = "32 * MiB" register "stapm_percent" = "80" - register "stapm_time" = "2500000" - register "stapm_power" = "7800" + register "stapm_time_ms" = "2500000" + register "stapm_power_mw" = "7800" # Enable I2C0 for audio, USB3 hub at 400kHz register "i2c[0]" = "{ diff --git a/src/soc/amd/stoneyridge/chip.h b/src/soc/amd/stoneyridge/chip.h index 8ed8e4d903..320bef0bdf 100644 --- a/src/soc/amd/stoneyridge/chip.h +++ b/src/soc/amd/stoneyridge/chip.h @@ -61,8 +61,8 @@ struct soc_amd_stoneyridge_config { u8 i2c_scl_reset; struct dw_i2c_bus_config i2c[STONEY_I2C_DEV_MAX]; u8 stapm_percent; - u32 stapm_time; - u32 stapm_power; + u32 stapm_time_ms; + u32 stapm_power_mw; }; typedef struct soc_amd_stoneyridge_config config_t; diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c index 555e901501..ed83e1ee1d 100644 --- a/src/soc/amd/stoneyridge/romstage.c +++ b/src/soc/amd/stoneyridge/romstage.c @@ -235,12 +235,13 @@ void soc_customize_init_early(AMD_EARLY_PARAMS *InitEarly) } cfg = dev->chip_info; platform = &InitEarly->PlatformConfig; - if ((cfg->stapm_percent) && (cfg->stapm_time) && (cfg->stapm_power)) { + if ((cfg->stapm_percent) && (cfg->stapm_time_ms) && + (cfg->stapm_power_mw)) { platform->PlatStapmConfig.CfgStapmScalar = cfg->stapm_percent; platform->PlatStapmConfig.CfgStapmTimeConstant = - cfg->stapm_time; - platform->PkgPwrLimitDC = cfg->stapm_power; - platform->PkgPwrLimitAC = cfg->stapm_power; + cfg->stapm_time_ms; + platform->PkgPwrLimitDC = cfg->stapm_power_mw; + platform->PkgPwrLimitAC = cfg->stapm_power_mw; platform->PlatStapmConfig.CfgStapmBoost = StapmBoostEnabled; } } |