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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-03-04 07:33:25 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-08-25 20:30:37 +0000 |
| commit | f5a26ff6fe753b86f76898ae1dfa23ba1e2eee82 (patch) | |
| tree | 63b8fa62a02121c99147e54d052247879ae2bdb2 /src | |
| parent | d56345b77ef608ad0528445a959ef0f2097ba3e3 (diff) | |
| download | coreboot-f5a26ff6fe753b86f76898ae1dfa23ba1e2eee82.tar.xz | |
asrock/e350m1: Switch away from AGESA_LEGACY_WRAPPER
Change-Id: I6ad99af55975b21b0a7671553246cdb5a1e19091
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/19149
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/asrock/e350m1/Kconfig | 1 | ||||
| -rw-r--r-- | src/mainboard/asrock/e350m1/OemCustomize.c | 14 |
2 files changed, 7 insertions, 8 deletions
diff --git a/src/mainboard/asrock/e350m1/Kconfig b/src/mainboard/asrock/e350m1/Kconfig index 7a3ae276d2..fa93d13464 100644 --- a/src/mainboard/asrock/e350m1/Kconfig +++ b/src/mainboard/asrock/e350m1/Kconfig @@ -17,7 +17,6 @@ if BOARD_ASROCK_E350M1 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select AGESA_LEGACY_WRAPPER select CPU_AMD_AGESA_FAMILY14 select NORTHBRIDGE_AMD_AGESA_FAMILY14 select SOUTHBRIDGE_AMD_CIMX_SB800 diff --git a/src/mainboard/asrock/e350m1/OemCustomize.c b/src/mainboard/asrock/e350m1/OemCustomize.c index ab563ae1b3..892e1c4f92 100644 --- a/src/mainboard/asrock/e350m1/OemCustomize.c +++ b/src/mainboard/asrock/e350m1/OemCustomize.c @@ -22,7 +22,7 @@ #include "Filecode.h" #include <string.h> -#include <northbridge/amd/agesa/agesawrapper.h> +#include <northbridge/amd/agesa/state_machine.h> #define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE @@ -42,7 +42,7 @@ **/ /*---------------------------------------------------------------------------------------*/ -static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly) +void board_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *InitEarly) { AGESA_STATUS Status; VOID *BrazosPcieComplexListPtr; @@ -120,7 +120,6 @@ PCIe_COMPLEX_DESCRIPTOR Brazos = { InitEarly->GnbConfig.PcieComplexList = BrazosPcieComplexListPtr; InitEarly->GnbConfig.PsppPolicy = 0; - return AGESA_SUCCESS; } /*---------------------------------------------------------------------------------------- @@ -134,12 +133,13 @@ PCIe_COMPLEX_DESCRIPTOR Brazos = { * is populated, AGESA will base its settings on the data from the table. Otherwise, it will * use its default conservative settings. */ -CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { +static CONST PSO_ENTRY ROMDATA PlatformMemoryTable[] = { NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 2), NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 1), PSO_END }; -const struct OEM_HOOK OemCustomize = { - .InitEarly = OemInitEarly, -}; +void board_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *InitPost) +{ + InitPost->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *)PlatformMemoryTable; +} |