superio/fintek: Add support for Fintek F81866AD-I

This patch adds support for the Fintek F81866AD-I SuperIO,
which is very similar to the fintek/f81865f.
This code adds some fan control support, inspired by fintek/f71869ad.
Furthermore its possible to change the temp sensor type (thermistor or diode).
Datasheet: Name: F81866D/A-I, Release Date: Jan 2012, Version: V0.12P
Link: http://www.alldatasheet.com/datasheet-pdf/pdf/459085/FINTEK/F81866AD-I.html

Change-Id: Id2fc1119b37142f8101f71908e394ee69c45041d
Signed-off-by: Fabian Kunkel <fabi@adv.bruhnspace.com>
Reviewed-on: http://review.coreboot.org/10287
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>

8 files changed, 352 insertions, 0 deletions

diff --git a/src/superio/fintek/Kconfig b/src/superio/fintek/Kconfig
index 2a7438b3c7..5403e0a4a2 100644
--- a/src/superio/fintek/Kconfig
+++ b/src/superio/fintek/Kconfig
@@ -54,3 +54,7 @@ config SUPERIO_FINTEK_F81216H
 config SUPERIO_FINTEK_F81865F
 	bool
 	select SUPERIO_FINTEK_COMMON_ROMSTAGE
+
+config SUPERIO_FINTEK_F81866D
+	bool
+	select SUPERIO_FINTEK_COMMON_ROMSTAGE
\ No newline at end of file
diff --git a/src/superio/fintek/Makefile.inc b/src/superio/fintek/Makefile.inc
index 60a7a04944..40abb8ad5a 100644
--- a/src/superio/fintek/Makefile.inc
+++ b/src/superio/fintek/Makefile.inc
@@ -28,3 +28,4 @@ subdirs-y += f71872
 subdirs-y += f71889
 subdirs-y += f81216h
 subdirs-y += f81865f
+subdirs-y += f81866d
diff --git a/src/superio/fintek/f81866d/Makefile.inc b/src/superio/fintek/f81866d/Makefile.inc
new file mode 100644
index 0000000000..2023b6c205
--- /dev/null
+++ b/src/superio/fintek/f81866d/Makefile.inc
@@ -0,0 +1,24 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
+## Copyright (C) 2015 BAP - Bruhnspace Advanced Projects
+## (Written by Fabian Kunkel <fabi@adv.bruhnspace.com> for BAP)
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc.
+##
+
+ramstage-$(CONFIG_SUPERIO_FINTEK_F81866D) += f81866d_hwm.c
+ramstage-$(CONFIG_SUPERIO_FINTEK_F81866D) += superio.c
diff --git a/src/superio/fintek/f81866d/chip.h b/src/superio/fintek/f81866d/chip.h
new file mode 100644
index 0000000000..9c9e7998fa
--- /dev/null
+++ b/src/superio/fintek/f81866d/chip.h
@@ -0,0 +1,54 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
+ * Copyright (C) 2015 BAP - Bruhnspace Advanced Projects
+ * (Written by Fabian Kunkel <fabi@adv.bruhnspace.com> for BAP)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#ifndef SUPERIO_FINTEK_F81866D_CHIP_H
+#define SUPERIO_FINTEK_F81866D_CHIP_H
+
+#include <stdint.h>
+
+struct superio_fintek_f81866d_config {
+
+	/* AMD TSI */
+	uint8_t hwm_amd_tsi_addr;
+	uint8_t hwm_amd_tsi_control;
+
+	/* Fan control */
+	uint8_t hwm_fan_select;
+	uint8_t hwm_fan_mode;
+	uint8_t hwm_fan3_control;
+	uint8_t hwm_fan2_temp_map_select;
+
+	uint8_t hwm_fan2_bound1;
+	uint8_t hwm_fan2_bound2;
+	uint8_t hwm_fan2_bound3;
+	uint8_t hwm_fan2_bound4;
+	uint8_t hwm_fan2_seg1_speed;
+	uint8_t hwm_fan2_seg2_speed;
+	uint8_t hwm_fan2_seg3_speed;
+	uint8_t hwm_fan2_seg4_speed;
+	uint8_t hwm_fan2_seg5_speed;
+
+	/* Temp sensor type */
+	uint8_t hwm_temp_sens_type;
+};
+
+#endif /* SUPERIO_FINTEK_F81866D_CHIP_H */
diff --git a/src/superio/fintek/f81866d/f81866d.h b/src/superio/fintek/f81866d/f81866d.h
new file mode 100644
index 0000000000..70a33b67b8
--- /dev/null
+++ b/src/superio/fintek/f81866d/f81866d.h
@@ -0,0 +1,47 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
+ * Copyright (C) 2015 BAP - Bruhnspace Advanced Projects
+ * (Written by Fabian Kunkel <fabi@adv.bruhnspace.com> for BAP)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+/*
+ * Datasheet:
+ *  - Name: F81866D/A-I, Release Date: Jan 2012, Version: V0.12P
+ *  - Link: http://www.alldatasheet.com/datasheet-pdf/pdf/459085/FINTEK/F81866AD-I.html
+ */
+
+#ifndef SUPERIO_FINTEK_F81866_H
+#define SUPERIO_FINTEK_F81866_H
+
+/* Logical Device Numbers (LDN) */
+#define F81866D_FDC	0x00	/* Floppy */
+#define F81866D_SP1	0x10	/* UART1 */
+#define F81866D_SP2	0x11	/* UART2 */
+#define F81866D_SP3	0x12	/* UART3 */
+#define F81866D_SP4	0x13	/* UART4 */
+#define F81866D_SP5	0x14	/* UART3 */
+#define F81866D_SP6	0x15	/* UART4 */
+#define F81866D_PP	0x03	/* Parallel Port */
+#define F81866D_HWM	0x04	/* Hardware Monitor */
+#define F81866D_KBC	0x05	/* Keyboard/Mouse */
+#define F81866D_GPIO	0x06	/* General Purpose I/O (GPIO) */
+#define F81866D_WDT	0x07	/* Watchdog */
+#define F81866D_PME	0x0a	/* Power Management Events (PME) */
+
+#endif /* SUPERIO_FINTEK_F81866_H */
diff --git a/src/superio/fintek/f81866d/f81866d_hwm.c b/src/superio/fintek/f81866d/f81866d_hwm.c
new file mode 100644
index 0000000000..bc24468923
--- /dev/null
+++ b/src/superio/fintek/f81866d/f81866d_hwm.c
@@ -0,0 +1,107 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
+ * Copyright (C) 2015 BAP - Bruhnspace Advanced Projects
+ * (Written by Fabian Kunkel <fabi@adv.bruhnspace.com> for BAP)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+/* Setup only for Fan2
+ * Todo: Add support for Fan1 and Fan3
+ */
+
+#include <arch/io.h>
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include "fintek_internal.h"
+#include "chip.h"
+
+
+/* Register addresses */
+// Choose between AMD and Intel
+#define HWM_AMD_TSI_ADDR             0x08
+#define HWM_AMD_TSI_CONTROL_REG      0x0A
+
+// Set temp sensors type
+#define TEMP_SENS_TYPE_REG	0x6B
+
+// FAN prog sel
+#define HWM_FAN3_CONTROL	0x9A
+#define HWM_FAN_SEL		0x94
+#define HWM_FAN_MODE		0x96
+#define HWM_FAN2_TEMP_MAP_SEL      0xBF
+
+// Fan 2 - 4 Boundries
+#define HWM_FAN2_BOUND1	0xB6
+#define HWM_FAN2_BOUND2	0xB7
+#define HWM_FAN2_BOUND3	0xB8
+#define HWM_FAN2_BOUND4	0xB9
+// Fan 2 - 5 Segment speeds
+#define HWM_FAN2_SEG1_SPEED_COUNT  0xBA
+#define HWM_FAN2_SEG2_SPEED_COUNT  0xBB
+#define HWM_FAN2_SEG3_SPEED_COUNT  0xBC
+#define HWM_FAN2_SEG4_SPEED_COUNT  0xBD
+#define HWM_FAN2_SEG5_SPEED_COUNT  0xBE
+
+
+void f81866d_hwm_init(struct device *dev)
+{
+	struct resource *res = find_resource(dev, PNP_IDX_IO0);
+
+	if (!res) {
+		printk(BIOS_WARNING, "Super I/O HWM: No HWM resource found.\n");
+		return;
+	}
+
+	const struct superio_fintek_f81866d_config *reg = dev->chip_info;
+	u16 port = res->base;
+
+	pnp_enter_conf_mode(dev);
+
+	/* Use AMD TSI */
+	pnp_write_index(port, HWM_AMD_TSI_ADDR, reg->hwm_amd_tsi_addr);
+	pnp_write_index(port, HWM_AMD_TSI_CONTROL_REG, reg->hwm_amd_tsi_control);
+
+	/* Set temp1 sensor to thermistor */
+	pnp_write_index(port, TEMP_SENS_TYPE_REG, reg->hwm_temp_sens_type);
+
+	/* Select FAN Type */
+	pnp_write_index(port, HWM_FAN_SEL, reg->hwm_fan_select);
+
+	/* Select FAN Mode*/
+	pnp_write_index(port, HWM_FAN_MODE, reg->hwm_fan_mode);
+
+	/* Set Boundries */
+	pnp_write_index(port, HWM_FAN2_BOUND1, reg->hwm_fan2_bound1);
+	pnp_write_index(port, HWM_FAN2_BOUND2, reg->hwm_fan2_bound2);
+	pnp_write_index(port, HWM_FAN2_BOUND3, reg->hwm_fan2_bound3);
+	pnp_write_index(port, HWM_FAN2_BOUND4, reg->hwm_fan2_bound4);
+
+	/* Set Speed */
+	pnp_write_index(port, HWM_FAN2_SEG1_SPEED_COUNT, reg->hwm_fan2_seg1_speed);
+	pnp_write_index(port, HWM_FAN2_SEG2_SPEED_COUNT, reg->hwm_fan2_seg2_speed);
+	pnp_write_index(port, HWM_FAN2_SEG3_SPEED_COUNT, reg->hwm_fan2_seg3_speed);
+	pnp_write_index(port, HWM_FAN2_SEG4_SPEED_COUNT, reg->hwm_fan2_seg4_speed);
+	pnp_write_index(port, HWM_FAN2_SEG5_SPEED_COUNT, reg->hwm_fan2_seg5_speed);
+
+	/* Set Fan control freq */
+	pnp_write_index(port, HWM_FAN3_CONTROL, reg->hwm_fan3_control);
+	pnp_write_index(port, HWM_FAN2_TEMP_MAP_SEL, reg->hwm_fan2_temp_map_select);
+
+	pnp_exit_conf_mode(dev);
+}
diff --git a/src/superio/fintek/f81866d/fintek_internal.h b/src/superio/fintek/f81866d/fintek_internal.h
new file mode 100644
index 0000000000..acd7532a8d
--- /dev/null
+++ b/src/superio/fintek/f81866d/fintek_internal.h
@@ -0,0 +1,31 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
+ * Copyright (C) 2015 BAP - Bruhnspace Advanced Projects
+ * (Written by Fabian Kunkel <fabi@adv.bruhnspace.com> for BAP)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#ifndef SUPERIO_FINTEK_F81866D_INTERNAL_H
+#define SUPERIO_FINTEK_F81866D_INTERNAL_H
+
+#include <arch/io.h>
+#include <device/pnp.h>
+
+void f81866d_hwm_init(struct device *dev);
+
+#endif /* SUPERIO_FINTEK_F81866D_INTERNAL_H */
diff --git a/src/superio/fintek/f81866d/superio.c b/src/superio/fintek/f81866d/superio.c
new file mode 100644
index 0000000000..a2245a071b
--- /dev/null
+++ b/src/superio/fintek/f81866d/superio.c
@@ -0,0 +1,84 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
+ * Copyright (C) 2015 BAP - Bruhnspace Advanced Projects
+ * (Written by Fabian Kunkel <fabi@adv.bruhnspace.com> for BAP)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#include <arch/io.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include <superio/conf_mode.h>
+#include <console/console.h>
+#include <stdlib.h>
+#include <pc80/keyboard.h>
+#include "f81866d.h"
+#include "fintek_internal.h"
+
+static void f81866d_init(struct device *dev)
+{
+	if (!dev->enabled)
+		return;
+
+	switch (dev->path.pnp.device) {
+	/* TODO: Might potentially need extra code for serial, wdt etc. */
+	case F81866D_KBC:
+		pc_keyboard_init();
+		break;
+	case F81866D_HWM:
+		// Fixing temp sensor read out and init Fan control
+		f81866d_hwm_init(dev);
+		break;
+	}
+}
+
+static struct device_operations ops = {
+	.read_resources   = pnp_read_resources,
+	.set_resources    = pnp_set_resources,
+	.enable_resources = pnp_enable_resources,
+	.enable           = pnp_alt_enable,
+	.init             = f81866d_init,
+	.ops_pnp_mode     = &pnp_conf_mode_8787_aa,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+	/* TODO: Some of the 0x7f8 etc. values may not be correct. */
+	{ &ops, F81866D_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
+	{ &ops, F81866D_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+	{ &ops, F81866D_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+	{ &ops, F81866D_SP3,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+	{ &ops, F81866D_SP4,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+	{ &ops, F81866D_SP5,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+	{ &ops, F81866D_SP6,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+	{ &ops, F81866D_KBC,  PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, { 0x07ff, 0}, },
+	{ &ops, F81866D_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
+	{ &ops, F81866D_HWM,  PNP_IO0 | PNP_IRQ0, { 0xff8, 0}, },
+	{ &ops, F81866D_GPIO, PNP_IRQ0, },
+	{ &ops, F81866D_PME, },
+	{ &ops, F81866D_WDT, },
+};
+
+static void enable_dev(struct device *dev)
+{
+	pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
+}
+
+struct chip_operations superio_fintek_f81866d_ops = {
+	CHIP_NAME("Fintek F81866AD-I Super I/O")
+	.enable_dev = enable_dev
+};