diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-09-10 06:30:54 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-09-12 16:09:31 +0000 |
| commit | f7ca672118b4d14c1e3686728c115df7adc2ec1d (patch) | |
| tree | ae4290b8644a823e4e21109c7dcc38de830dab8e /src | |
| parent | f3ec5ed5559c59a63419f20246751e6f39225ef7 (diff) | |
| download | coreboot-f7ca672118b4d14c1e3686728c115df7adc2ec1d.tar.xz | |
AGESA boards: Clean up some includes
Change-Id: I84c70aa04ab556a3898d3525f7b9aab85812f61d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21475
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
35 files changed, 22 insertions, 162 deletions
diff --git a/src/mainboard/amd/dinar/mainboard.c b/src/mainboard/amd/dinar/mainboard.c index 947ec65e10..ecdb0db4b1 100644 --- a/src/mainboard/amd/dinar/mainboard.c +++ b/src/mainboard/amd/dinar/mainboard.c @@ -15,11 +15,7 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> -#include <arch/io.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> -#include <device/pci_def.h> + #include <NbPlatform.h> //#define SMBUS_IO_BASE 0x6000 diff --git a/src/mainboard/amd/inagua/mainboard.c b/src/mainboard/amd/inagua/mainboard.c index d8e4f05790..f58c7d176d 100644 --- a/src/mainboard/amd/inagua/mainboard.c +++ b/src/mainboard/amd/inagua/mainboard.c @@ -15,11 +15,7 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> -#include <arch/io.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> -#include <device/pci_def.h> + #include <southbridge/amd/sb800/sb800.h> #include "SBPLATFORM.h" /* Platfrom Specific Definitions */ diff --git a/src/mainboard/amd/olivehill/mainboard.c b/src/mainboard/amd/olivehill/mainboard.c index 3560c85543..a149ee598d 100644 --- a/src/mainboard/amd/olivehill/mainboard.c +++ b/src/mainboard/amd/olivehill/mainboard.c @@ -15,14 +15,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> -#include <arch/io.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> -#include <device/pci_def.h> -#include <arch/acpi.h> -#include <northbridge/amd/agesa/BiosCallOuts.h> -#include <northbridge/amd/agesa/state_machine.h> /********************************************** * enable the dedicated function in mainboard. diff --git a/src/mainboard/amd/parmer/mainboard.c b/src/mainboard/amd/parmer/mainboard.c index 1e471bc2c2..59f7a818e2 100644 --- a/src/mainboard/amd/parmer/mainboard.c +++ b/src/mainboard/amd/parmer/mainboard.c @@ -15,15 +15,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> -#include <arch/io.h> -#include <cpu/x86/msr.h> -#include <northbridge/amd/agesa/BiosCallOuts.h> -#include <cpu/amd/mtrr.h> -#include <device/pci_def.h> -#include <arch/acpi.h> -#include <cpu/amd/agesa/s3_resume.h> -#include <northbridge/amd/agesa/state_machine.h> /************************************************* * enable the dedicated function in parmer board. diff --git a/src/mainboard/amd/persimmon/mainboard.c b/src/mainboard/amd/persimmon/mainboard.c index c2fc613321..fc43f2eac9 100644 --- a/src/mainboard/amd/persimmon/mainboard.c +++ b/src/mainboard/amd/persimmon/mainboard.c @@ -16,15 +16,10 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <arch/io.h> -#include <cpu/x86/msr.h> -#include <device/pci_def.h> + #include <southbridge/amd/common/amd_pci_util.h> #include <southbridge/amd/cimx/cimx_util.h> -#include <arch/acpi.h> -#include <northbridge/amd/agesa/BiosCallOuts.h> -#include <cpu/amd/mtrr.h> #include "SBPLATFORM.h" #include <southbridge/amd/cimx/sb800/pci_devs.h> #include <northbridge/amd/agesa/family14/pci_devs.h> diff --git a/src/mainboard/amd/south_station/mainboard.c b/src/mainboard/amd/south_station/mainboard.c index b546ed8333..9afe9b4220 100644 --- a/src/mainboard/amd/south_station/mainboard.c +++ b/src/mainboard/amd/south_station/mainboard.c @@ -14,14 +14,10 @@ */ #include <console/console.h> +#include <delay.h> #include <device/device.h> -#include <device/pci.h> -#include <arch/io.h> -#include <cpu/x86/msr.h> + #include <southbridge/amd/sb800/sb800.h> -#include <cpu/amd/mtrr.h> -#include <device/pci_def.h> -#include <delay.h> #include "SBPLATFORM.h" /* Platfrom Specific Definitions */ diff --git a/src/mainboard/amd/thatcher/mainboard.c b/src/mainboard/amd/thatcher/mainboard.c index 2ee8ba505a..27b9d99e6b 100644 --- a/src/mainboard/amd/thatcher/mainboard.c +++ b/src/mainboard/amd/thatcher/mainboard.c @@ -15,15 +15,7 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> -#include <arch/io.h> #include <cpu/x86/msr.h> -#include <northbridge/amd/agesa/BiosCallOuts.h> -#include <cpu/amd/mtrr.h> -#include <device/pci_def.h> -#include <arch/acpi.h> -#include <cpu/amd/agesa/s3_resume.h> -#include <northbridge/amd/agesa/state_machine.h> /************************************************* * enable the dedicated function in thatcher board. diff --git a/src/mainboard/amd/torpedo/mainboard.c b/src/mainboard/amd/torpedo/mainboard.c index 86339efca7..1bbfdcdf69 100644 --- a/src/mainboard/amd/torpedo/mainboard.c +++ b/src/mainboard/amd/torpedo/mainboard.c @@ -15,11 +15,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> -#include <arch/io.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> -#include <device/pci_def.h> #define ONE_MB 0x100000 //#define SMBUS_IO_BASE 0x6000 diff --git a/src/mainboard/amd/union_station/mainboard.c b/src/mainboard/amd/union_station/mainboard.c index 09aef03dff..ef52e03578 100644 --- a/src/mainboard/amd/union_station/mainboard.c +++ b/src/mainboard/amd/union_station/mainboard.c @@ -15,12 +15,8 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> -#include <arch/io.h> -#include <cpu/x86/msr.h> -#include <device/pci_def.h> + #include <southbridge/amd/sb800/sb800.h> -#include <cpu/amd/mtrr.h> #include "SBPLATFORM.h" /* Platfrom Specific Definitions */ void set_pcie_reset(void); diff --git a/src/mainboard/asrock/e350m1/mainboard.c b/src/mainboard/asrock/e350m1/mainboard.c index 452d50fe40..7c2031c6db 100644 --- a/src/mainboard/asrock/e350m1/mainboard.c +++ b/src/mainboard/asrock/e350m1/mainboard.c @@ -15,11 +15,8 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <arch/io.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> -#include <device/pci_def.h> + #include <southbridge/amd/cimx/cimx_util.h> #include "SBPLATFORM.h" diff --git a/src/mainboard/asrock/imb-a180/mainboard.c b/src/mainboard/asrock/imb-a180/mainboard.c index 3560c85543..a149ee598d 100644 --- a/src/mainboard/asrock/imb-a180/mainboard.c +++ b/src/mainboard/asrock/imb-a180/mainboard.c @@ -15,14 +15,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> -#include <arch/io.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> -#include <device/pci_def.h> -#include <arch/acpi.h> -#include <northbridge/amd/agesa/BiosCallOuts.h> -#include <northbridge/amd/agesa/state_machine.h> /********************************************** * enable the dedicated function in mainboard. diff --git a/src/mainboard/asus/f2a85-m/mainboard.c b/src/mainboard/asus/f2a85-m/mainboard.c index 114db4dd76..00d887fe49 100644 --- a/src/mainboard/asus/f2a85-m/mainboard.c +++ b/src/mainboard/asus/f2a85-m/mainboard.c @@ -13,16 +13,9 @@ * GNU General Public License for more details. */ -#include <northbridge/amd/agesa/state_machine.h> -#include <northbridge/amd/agesa/BiosCallOuts.h> - -#include <arch/acpi.h> -#include <arch/io.h> #include <console/console.h> #include <cpu/x86/msr.h> #include <device/device.h> -#include <device/pci.h> -#include <device/pci_def.h> /************************************************* * enable the dedicated function in thatcher board. diff --git a/src/mainboard/bap/ode_e20XX/mainboard.c b/src/mainboard/bap/ode_e20XX/mainboard.c index 7e729f0c06..0f4fbb355f 100644 --- a/src/mainboard/bap/ode_e20XX/mainboard.c +++ b/src/mainboard/bap/ode_e20XX/mainboard.c @@ -17,18 +17,11 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> -#include <arch/io.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> -#include <device/pci_def.h> -#include <arch/acpi.h> + #include <southbridge/amd/agesa/hudson/pci_devs.h> #include <southbridge/amd/agesa/hudson/amd_pci_int_defs.h> #include <southbridge/amd/common/amd_pci_util.h> #include <northbridge/amd/agesa/family16kb/pci_devs.h> -#include <northbridge/amd/agesa/BiosCallOuts.h> -#include <northbridge/amd/agesa/state_machine.h> /*********************************************************** * These arrays set up the FCH PCI_INTR registers 0xC00/0xC01. diff --git a/src/mainboard/biostar/am1ml/mainboard.c b/src/mainboard/biostar/am1ml/mainboard.c index f4ea2f3bab..fc7dd1d154 100644 --- a/src/mainboard/biostar/am1ml/mainboard.c +++ b/src/mainboard/biostar/am1ml/mainboard.c @@ -18,14 +18,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> -#include <arch/io.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> -#include <device/pci_def.h> -#include <arch/acpi.h> -#include <northbridge/amd/agesa/BiosCallOuts.h> -#include <northbridge/amd/agesa/state_machine.h> #include <southbridge/amd/agesa/hudson/pci_devs.h> #include <southbridge/amd/agesa/hudson/amd_pci_int_defs.h> #include <southbridge/amd/common/amd_pci_util.h> diff --git a/src/mainboard/elmex/pcm205400/mainboard.c b/src/mainboard/elmex/pcm205400/mainboard.c index c2fc613321..3e419a3775 100644 --- a/src/mainboard/elmex/pcm205400/mainboard.c +++ b/src/mainboard/elmex/pcm205400/mainboard.c @@ -16,15 +16,9 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <arch/io.h> -#include <cpu/x86/msr.h> -#include <device/pci_def.h> #include <southbridge/amd/common/amd_pci_util.h> #include <southbridge/amd/cimx/cimx_util.h> -#include <arch/acpi.h> -#include <northbridge/amd/agesa/BiosCallOuts.h> -#include <cpu/amd/mtrr.h> #include "SBPLATFORM.h" #include <southbridge/amd/cimx/sb800/pci_devs.h> #include <northbridge/amd/agesa/family14/pci_devs.h> diff --git a/src/mainboard/gizmosphere/gizmo/mainboard.c b/src/mainboard/gizmosphere/gizmo/mainboard.c index 98cafae738..baed5f028c 100644 --- a/src/mainboard/gizmosphere/gizmo/mainboard.c +++ b/src/mainboard/gizmosphere/gizmo/mainboard.c @@ -14,18 +14,14 @@ * GNU General Public License for more details. */ +#include <arch/io.h> #include <console/console.h> +#include <delay.h> #include <device/device.h> -#include <device/pci.h> -#include <arch/io.h> -#include <cpu/x86/msr.h> #include <device/pci_def.h> + #include <southbridge/amd/sb800/sb800.h> -#include <arch/acpi.h> -#include <northbridge/amd/agesa/BiosCallOuts.h> -#include <cpu/amd/mtrr.h> #include "SBPLATFORM.h" -#include <delay.h> void set_pcie_reset(void); void set_pcie_dereset(void); diff --git a/src/mainboard/gizmosphere/gizmo2/mainboard.c b/src/mainboard/gizmosphere/gizmo2/mainboard.c index ad4f9c9aa4..6a9db806e1 100644 --- a/src/mainboard/gizmosphere/gizmo2/mainboard.c +++ b/src/mainboard/gizmosphere/gizmo2/mainboard.c @@ -17,18 +17,10 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> -#include <arch/io.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> -#include <device/pci_def.h> -#include <arch/acpi.h> #include <southbridge/amd/agesa/hudson/pci_devs.h> #include <southbridge/amd/agesa/hudson/amd_pci_int_defs.h> #include <southbridge/amd/common/amd_pci_util.h> #include <northbridge/amd/agesa/family16kb/pci_devs.h> -#include <northbridge/amd/agesa/BiosCallOuts.h> -#include <northbridge/amd/agesa/state_machine.h> /*********************************************************** * These arrays set up the FCH PCI_INTR registers 0xC00/0xC01. diff --git a/src/mainboard/hp/abm/mainboard.c b/src/mainboard/hp/abm/mainboard.c index 4af8678843..742c28d630 100644 --- a/src/mainboard/hp/abm/mainboard.c +++ b/src/mainboard/hp/abm/mainboard.c @@ -16,11 +16,7 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> -#include <arch/io.h> -#include <arch/acpi.h> -#include <northbridge/amd/agesa/BiosCallOuts.h> -#include <northbridge/amd/agesa/state_machine.h> + #include <southbridge/amd/common/amd_pci_util.h> #include <southbridge/amd/agesa/hudson/pci_devs.h> #include <northbridge/amd/agesa/family16kb/pci_devs.h> diff --git a/src/mainboard/hp/pavilion_m6_1035dx/mainboard.c b/src/mainboard/hp/pavilion_m6_1035dx/mainboard.c index 146c84376b..de84dbed46 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/mainboard.c +++ b/src/mainboard/hp/pavilion_m6_1035dx/mainboard.c @@ -13,21 +13,15 @@ * GNU General Public License for more details. */ -#include <northbridge/amd/agesa/state_machine.h> -#include <northbridge/amd/agesa/BiosCallOuts.h> #include "ec.h" #include <arch/acpi.h> #include <arch/io.h> #include <console/console.h> -#include <cpu/x86/msr.h> #include <device/device.h> -#include <device/pci.h> -#include <device/pci_def.h> #include <southbridge/amd/agesa/hudson/smi.h> - static void pavilion_cold_boot_init(void) { /* Lid SMI is only used in non-ACPI mode; leave it off in S3 resume */ diff --git a/src/mainboard/jetway/nf81-t56n-lf/mainboard.c b/src/mainboard/jetway/nf81-t56n-lf/mainboard.c index 801d493953..4b22afe088 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/mainboard.c +++ b/src/mainboard/jetway/nf81-t56n-lf/mainboard.c @@ -15,15 +15,10 @@ * GNU General Public License for more details. */ -#include <northbridge/amd/agesa/BiosCallOuts.h> -#include <arch/acpi.h> #include <arch/io.h> #include <console/console.h> -#include <cpu/x86/msr.h> #include <device/device.h> -#include <device/pci.h> -#include <device/pci_def.h> #include <southbridge/amd/common/amd_pci_util.h> #include <southbridge/amd/cimx/sb800/SBPLATFORM.h> diff --git a/src/mainboard/lenovo/g505s/mainboard.c b/src/mainboard/lenovo/g505s/mainboard.c index 579fbc0a5a..a33c1322e4 100644 --- a/src/mainboard/lenovo/g505s/mainboard.c +++ b/src/mainboard/lenovo/g505s/mainboard.c @@ -13,21 +13,14 @@ * GNU General Public License for more details. */ -#include <northbridge/amd/agesa/state_machine.h> -#include <northbridge/amd/agesa/BiosCallOuts.h> #include "ec.h" #include <arch/acpi.h> -#include <arch/io.h> #include <console/console.h> -#include <cpu/x86/msr.h> #include <device/device.h> -#include <device/pci.h> -#include <device/pci_def.h> #include <southbridge/amd/agesa/hudson/smi.h> - static void pavilion_cold_boot_init(void) { /* Lid SMI is only used in non-ACPI mode; leave it off in S3 resume */ diff --git a/src/mainboard/lippert/frontrunner-af/mainboard.c b/src/mainboard/lippert/frontrunner-af/mainboard.c index 1212764cae..144c367b69 100644 --- a/src/mainboard/lippert/frontrunner-af/mainboard.c +++ b/src/mainboard/lippert/frontrunner-af/mainboard.c @@ -18,12 +18,9 @@ #include <device/device.h> #include <device/pci.h> #include <arch/io.h> -#include <cpu/x86/msr.h> #include <device/pci_def.h> #include <southbridge/amd/sb800/sb800.h> #include <arch/acpi.h> -#include <northbridge/amd/agesa/BiosCallOuts.h> -#include <cpu/amd/mtrr.h> #include "SBPLATFORM.h" #include "OEM.h" /* SMBUS0_BASE_ADDRESS */ #include <southbridge/amd/cimx/sb800/gpio_oem.h> diff --git a/src/mainboard/lippert/toucan-af/mainboard.c b/src/mainboard/lippert/toucan-af/mainboard.c index fa5eb41874..e5908bd95f 100644 --- a/src/mainboard/lippert/toucan-af/mainboard.c +++ b/src/mainboard/lippert/toucan-af/mainboard.c @@ -18,12 +18,9 @@ #include <device/device.h> #include <device/pci.h> #include <arch/io.h> -#include <cpu/x86/msr.h> #include <device/pci_def.h> #include <southbridge/amd/sb800/sb800.h> #include <arch/acpi.h> -#include <northbridge/amd/agesa/BiosCallOuts.h> -#include <cpu/amd/mtrr.h> #include "SBPLATFORM.h" #include "OEM.h" /* SMBUS0_BASE_ADDRESS */ #include <southbridge/amd/cimx/sb800/gpio_oem.h> diff --git a/src/mainboard/msi/ms7721/mainboard.c b/src/mainboard/msi/ms7721/mainboard.c index 114db4dd76..00d887fe49 100644 --- a/src/mainboard/msi/ms7721/mainboard.c +++ b/src/mainboard/msi/ms7721/mainboard.c @@ -13,16 +13,9 @@ * GNU General Public License for more details. */ -#include <northbridge/amd/agesa/state_machine.h> -#include <northbridge/amd/agesa/BiosCallOuts.h> - -#include <arch/acpi.h> -#include <arch/io.h> #include <console/console.h> #include <cpu/x86/msr.h> #include <device/device.h> -#include <device/pci.h> -#include <device/pci_def.h> /************************************************* * enable the dedicated function in thatcher board. diff --git a/src/mainboard/pcengines/apu1/mainboard.c b/src/mainboard/pcengines/apu1/mainboard.c index a678559c7e..e9f592f518 100644 --- a/src/mainboard/pcengines/apu1/mainboard.c +++ b/src/mainboard/pcengines/apu1/mainboard.c @@ -18,13 +18,10 @@ #include <device/device.h> #include <device/pci.h> #include <arch/io.h> -#include <cpu/x86/msr.h> #include <device/pci_def.h> #include <southbridge/amd/common/amd_pci_util.h> #include <southbridge/amd/cimx/cimx_util.h> #include <arch/acpi.h> -#include <northbridge/amd/agesa/BiosCallOuts.h> -#include <cpu/amd/mtrr.h> #include <smbios.h> #include <string.h> #include "SBPLATFORM.h" diff --git a/src/mainboard/pcengines/apu2/acpi_tables.c b/src/mainboard/pcengines/apu2/acpi_tables.c index d9f7f9ae7f..d448080637 100644 --- a/src/mainboard/pcengines/apu2/acpi_tables.c +++ b/src/mainboard/pcengines/apu2/acpi_tables.c @@ -20,8 +20,6 @@ #include <arch/ioapic.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> #include <cpu/amd/amdfam16.h> unsigned long acpi_fill_madt(unsigned long current) diff --git a/src/mainboard/pcengines/apu2/mainboard.c b/src/mainboard/pcengines/apu2/mainboard.c index a9b59c2316..7b8da2ed0a 100644 --- a/src/mainboard/pcengines/apu2/mainboard.c +++ b/src/mainboard/pcengines/apu2/mainboard.c @@ -27,8 +27,6 @@ #include <superio/nuvoton/nct5104d/nct5104d.h> #include <smbios.h> #include <string.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> #include "gpio_ftns.h" #define SPD_SIZE 128 diff --git a/src/mainboard/supermicro/h8qgi/mainboard.c b/src/mainboard/supermicro/h8qgi/mainboard.c index 0b1f00bc73..af7fc43ccd 100644 --- a/src/mainboard/supermicro/h8qgi/mainboard.c +++ b/src/mainboard/supermicro/h8qgi/mainboard.c @@ -17,8 +17,6 @@ #include <device/device.h> #include <device/pci.h> #include <arch/io.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> #include <device/pci_def.h> #include <NbPlatform.h> diff --git a/src/mainboard/supermicro/h8scm/mainboard.c b/src/mainboard/supermicro/h8scm/mainboard.c index 681d845a84..378acc9b98 100644 --- a/src/mainboard/supermicro/h8scm/mainboard.c +++ b/src/mainboard/supermicro/h8scm/mainboard.c @@ -18,8 +18,6 @@ #include <device/pci.h> #include <arch/io.h> #include <boot/tables.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> #include <device/pci_def.h> #include <NbPlatform.h> #include "chip.h" diff --git a/src/mainboard/tyan/s8226/mainboard.c b/src/mainboard/tyan/s8226/mainboard.c index 30173e3c47..caa43f3470 100644 --- a/src/mainboard/tyan/s8226/mainboard.c +++ b/src/mainboard/tyan/s8226/mainboard.c @@ -18,8 +18,6 @@ #include <device/pci.h> #include <arch/io.h> #include <boot/tables.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> #include <device/pci_def.h> #include <NbPlatform.h> #include "chip.h" diff --git a/src/northbridge/amd/agesa/family14/pci_devs.h b/src/northbridge/amd/agesa/family14/pci_devs.h index 90770a8cfa..5076ede65d 100644 --- a/src/northbridge/amd/agesa/family14/pci_devs.h +++ b/src/northbridge/amd/agesa/family14/pci_devs.h @@ -16,6 +16,8 @@ #ifndef _AMD_FAM14_PCI_DEVS_H_ #define _AMD_FAM14_PCI_DEVS_H_ +#include <device/pci_def.h> + #define BUS0 0 /* Graphics and Display */ diff --git a/src/northbridge/amd/agesa/family15tn/pci_devs.h b/src/northbridge/amd/agesa/family15tn/pci_devs.h index 09df2ed605..60834e4768 100644 --- a/src/northbridge/amd/agesa/family15tn/pci_devs.h +++ b/src/northbridge/amd/agesa/family15tn/pci_devs.h @@ -16,6 +16,8 @@ #ifndef _AMD_FAM15TN_PCI_DEVS_H_ #define _AMD_FAM15TN_PCI_DEVS_H_ +#include <device/pci_def.h> + #define BUS0 0 /* Graphics and Display */ diff --git a/src/northbridge/amd/agesa/family16kb/pci_devs.h b/src/northbridge/amd/agesa/family16kb/pci_devs.h index b9393de98b..b2d02d8f33 100644 --- a/src/northbridge/amd/agesa/family16kb/pci_devs.h +++ b/src/northbridge/amd/agesa/family16kb/pci_devs.h @@ -16,6 +16,8 @@ #ifndef _AMD_FAM16KB_PCI_DEVS_H_ #define _AMD_FAM16KB_PCI_DEVS_H_ +#include <device/pci_def.h> + #define BUS0 0 /* Graphics and Display */ diff --git a/src/southbridge/amd/agesa/hudson/pci_devs.h b/src/southbridge/amd/agesa/hudson/pci_devs.h index d335fc2ec5..4706403b3a 100644 --- a/src/southbridge/amd/agesa/hudson/pci_devs.h +++ b/src/southbridge/amd/agesa/hudson/pci_devs.h @@ -16,6 +16,8 @@ #ifndef _AGESA_HUDSON_PCI_DEVS_H_ #define _AGESA_HUDSON_PCI_DEVS_H_ +#include <device/pci_def.h> + #define BUS0 0 /* XHCI */ diff --git a/src/southbridge/amd/cimx/sb800/pci_devs.h b/src/southbridge/amd/cimx/sb800/pci_devs.h index e911a9ddee..5d57951efd 100644 --- a/src/southbridge/amd/cimx/sb800/pci_devs.h +++ b/src/southbridge/amd/cimx/sb800/pci_devs.h @@ -16,6 +16,8 @@ #ifndef _CIMX_SB800_PCI_DEVS_H_ #define _CIMX_SB800_PCI_DEVS_H_ +#include <device/pci_def.h> + #define BUS0 0 /* SATA */ |