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author | Marc Jones <marcj303@gmail.com> | 2017-05-03 15:52:09 -0600 |
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committer | Marc Jones <marc@marcjonesconsulting.com> | 2017-08-24 17:07:30 +0000 |
commit | 05b2f69cd0fdf0b1cf3b349e64a8b99c9688d27c (patch) | |
tree | 2c803f4bbd5030d9db5cabb9aabd5c246189ecd8 /src | |
parent | 5f34b37d80379eaf49e425719a6dffe58b9652fd (diff) | |
download | coreboot-05b2f69cd0fdf0b1cf3b349e64a8b99c9688d27c.tar.xz |
amd/pi/hudson: Clean up makefile.inc
Sort makefile.inc into rom, ram, ver, smm stages and alphabetize.
Change-Id: Ic8c6ca2b57527fcc96c135cc801a098201bf0465
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/19640
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/southbridge/amd/pi/hudson/Makefile.inc | 50 |
1 files changed, 26 insertions, 24 deletions
diff --git a/src/southbridge/amd/pi/hudson/Makefile.inc b/src/southbridge/amd/pi/hudson/Makefile.inc index 970ae57279..e1d164fd89 100644 --- a/src/southbridge/amd/pi/hudson/Makefile.inc +++ b/src/southbridge/amd/pi/hudson/Makefile.inc @@ -28,36 +28,38 @@ # #***************************************************************************** -romstage-y += smbus.c smbus_spd.c +romstage-y += early_setup.c +romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c +romstage-$(CONFIG_HUDSON_IMC_FWM) += imc.c +romstage-y += smbus.c +romstage-y += smbus_spd.c +romstage-$(CONFIG_HUDSON_UART) += uart.c + +verstage-y += early_setup.c +verstage-y += reset.c +verstage-$(CONFIG_HUDSON_UART) += uart.c + +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c +ramstage-$(CONFIG_SOUTHBRIDGE_AMD_PI_KERN) += gpio.c +ramstage-y += hda.c ramstage-y += hudson.c -ramstage-y += usb.c -ramstage-y += lpc.c -ramstage-y += sm.c ramstage-y += ide.c -ramstage-y += sata.c -ramstage-y += hda.c +ramstage-$(CONFIG_HUDSON_IMC_FWM) += imc.c +ramstage-y += lpc.c ramstage-y += pci.c ramstage-y += pcie.c -ramstage-y += sd.c -ramstage-$(CONFIG_SOUTHBRIDGE_AMD_PI_KERN) += gpio.c - -ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c ramstage-y += reset.c -romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c -ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c -romstage-y += early_setup.c -ifeq ($(CONFIG_HUDSON_IMC_FWM), y) -romstage-y += imc.c -ramstage-y += imc.c -endif - -ifeq ($(CONFIG_HUDSON_UART), y) -romstage-y += uart.c -ramstage-y += uart.c -endif +ramstage-y += sata.c +ramstage-y += sd.c +ramstage-y += sm.c +ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c +ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c +ramstage-$(CONFIG_HUDSON_UART) += uart.c +ramstage-y += usb.c -smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c smi_util.c -ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c smi_util.c +smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c +smm-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c # ROMSIG At ROMBASE + 0x20000: # +-----------+---------------+----------------+------------+ |