diff options
author | Subrata Banik <subrata.banik@intel.com> | 2019-08-27 11:01:33 +0530 |
---|---|---|
committer | Subrata Banik <subrata.banik@intel.com> | 2019-08-27 08:25:10 +0000 |
commit | 1799011dc6914927d951cc076a405c6b20ead5d5 (patch) | |
tree | 420d6be7e7d0398efca84d4ee0520d1659ee7660 /src | |
parent | da10b9224aaa0c41571b5c0c7017b75d4343ebe4 (diff) | |
download | coreboot-1799011dc6914927d951cc076a405c6b20ead5d5.tar.xz |
soc/intel/{apl,cnl,dnv,icl,skl} : Use common cpu/intel/car/romstage.c code
This patch includes common romstage code to setup the console
and load postcar.
Fix booting regression issue on all latest IA-SOC introduced by CB:34893
Change-Id: I9da592960f20ed9742ff696198dbc028ef519ddf
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35109
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/soc/intel/apollolake/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/cannonlake/romstage/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/denverton_ns/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/icelake/romstage/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/skylake/romstage/Makefile.inc | 2 |
5 files changed, 5 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 60b1a3c4f5..41faf7243b 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -21,6 +21,7 @@ bootblock-y += spi.c bootblock-y += uart.c romstage-y += car.c +romstage-y += ../../../cpu/intel/car/romstage.c romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += romstage.c romstage-y += gspi.c romstage-y += heci.c diff --git a/src/soc/intel/cannonlake/romstage/Makefile.inc b/src/soc/intel/cannonlake/romstage/Makefile.inc index 75d79856e4..33d9629e1d 100644 --- a/src/soc/intel/cannonlake/romstage/Makefile.inc +++ b/src/soc/intel/cannonlake/romstage/Makefile.inc @@ -13,6 +13,7 @@ # GNU General Public License for more details. # +romstage-y += ../../../../cpu/intel/car/romstage.c romstage-y += romstage.c romstage-y += fsp_params.c romstage-y += systemagent.c diff --git a/src/soc/intel/denverton_ns/Makefile.inc b/src/soc/intel/denverton_ns/Makefile.inc index f01fadbdfe..10bb665bd0 100644 --- a/src/soc/intel/denverton_ns/Makefile.inc +++ b/src/soc/intel/denverton_ns/Makefile.inc @@ -36,6 +36,7 @@ postcar-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c romstage-y += memmap.c romstage-y += reset.c +romstage-y += ../../../cpu/intel/car/romstage.c romstage-y += romstage.c romstage-y += tsc_freq.c romstage-y += gpio_dnv.c diff --git a/src/soc/intel/icelake/romstage/Makefile.inc b/src/soc/intel/icelake/romstage/Makefile.inc index 28e7eada55..baa4d46e55 100644 --- a/src/soc/intel/icelake/romstage/Makefile.inc +++ b/src/soc/intel/icelake/romstage/Makefile.inc @@ -14,5 +14,6 @@ # romstage-y += fsp_params.c +romstage-y += ../../../../cpu/intel/car/romstage.c romstage-y += romstage.c romstage-y += systemagent.c diff --git a/src/soc/intel/skylake/romstage/Makefile.inc b/src/soc/intel/skylake/romstage/Makefile.inc index e929ebaf17..7bb9d4bc03 100644 --- a/src/soc/intel/skylake/romstage/Makefile.inc +++ b/src/soc/intel/skylake/romstage/Makefile.inc @@ -1,4 +1,4 @@ -romstage-$(CONFIG_PLATFORM_USES_FSP1_1) += ../../../../cpu/intel/car/romstage.c +romstage-y += ../../../../cpu/intel/car/romstage.c romstage-$(CONFIG_PLATFORM_USES_FSP1_1) += romstage.c romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += romstage_fsp20.c romstage-y += systemagent.c |