diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2014-08-11 08:06:04 -0700 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2015-03-27 05:40:17 +0100 |
| commit | 17b786630fcd49eef46e9df7a18f8f8fb36d5308 (patch) | |
| tree | cc78dc3bdf26557a3060d58494bc9c221510e1d9 /src | |
| parent | 446fb8e45ef2d555579e7659c1c0a91bb8ff3d78 (diff) | |
| download | coreboot-17b786630fcd49eef46e9df7a18f8f8fb36d5308.tar.xz | |
samus: Enable WLAN wake GPIO in _PRW
Add ACPI device for WLAN and enable GPIO 10 as wake
source in _PRW.
BUG=chrome-os-partner:28234,chrome-os-partner:30671
BRANCH=None
TEST=boot on samus, check for WLAN in /proc/acpi/wakeup
Original-Change-Id: I09b6eeae5bd88ee9d7e0b7e735ed871e8ae6963a
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/211820
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit c65ce028e64aebffb99648b2c34c4ff0e7c4e70f)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: If192564ddd10c7fe758a4d7266394a30e7d966d4
Reviewed-on: http://review.coreboot.org/8953
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/samus/acpi/mainboard.asl | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/src/mainboard/google/samus/acpi/mainboard.asl b/src/mainboard/google/samus/acpi/mainboard.asl index 9e9b577986..8d5ecc6b30 100644 --- a/src/mainboard/google/samus/acpi/mainboard.asl +++ b/src/mainboard/google/samus/acpi/mainboard.asl @@ -70,6 +70,30 @@ Scope (\_SB) } } +/* + * WLAN connected to Root Port 3, becomes Root Port 1 after coalesce + */ +Scope (\_SB.PCI0.RP01) +{ + Device (WLAN) + { + Name (_ADR, 0x00000000) + + /* GPIO10 is PCH_WLAN_WAKE_L */ + Name (GPIO, 10) + + Name (_PRW, Package() { GPIO, 3 }) + + Method (_DSW, 3, NotSerialized) + { + If (LEqual (Arg0, 1)) { + // Enable GPIO as wake source + \_SB.PCI0.LPCB.GPIO.GWAK (^GPIO) + } + } + } +} + Scope (\_SB.PCI0.I2C0) { Device (ATPB) |