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authorVladimir Serbinenko <phcoder@gmail.com>2015-05-18 13:13:48 +0200
committerVladimir Serbinenko <phcoder@gmail.com>2015-05-19 16:23:32 +0200
commit3387e4e770a37bc09289ffa59fa3c781d8970126 (patch)
tree87d1857e16ecbef56f58940a2f4c2ed2ce6c2dae /src
parent4679c41db292b80ce51c7d923e2f22258145522b (diff)
downloadcoreboot-3387e4e770a37bc09289ffa59fa3c781d8970126.tar.xz
gma/edid: Fix gma register access.
0x20 was incorrectly represented as 4 * 5 while in fact it's 4 * 8 Change-Id: I6053a3baa6de0da9f1d648009353bc1fe542f81f Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/10237 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/drivers/intel/gma/edid.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/drivers/intel/gma/edid.c b/src/drivers/intel/gma/edid.c
index 36d8813f00..e70156eb28 100644
--- a/src/drivers/intel/gma/edid.c
+++ b/src/drivers/intel/gma/edid.c
@@ -49,11 +49,11 @@ void intel_gmbus_read_edid(u8 *mmio, u8 bus, u8 slave, u8 *edid, u32 edid_size)
write32(mmio + 4 * 0, bus);
wait_rdy(mmio);
/* Ensure index bits are disabled. */
- write32(mmio + 4 * 5, 0);
+ write32(mmio + 4 * 8, 0);
write32(mmio + 4 * 1, 0x46000000 | (slave << 1));
wait_rdy(mmio);
/* Ensure index bits are disabled. */
- write32(mmio + 4 * 5, 0);
+ write32(mmio + 4 * 8, 0);
write32(mmio + 4 * 1, 0x4a000001 | (slave << 1)
| (edid_size << 16));
for (i = 0; i < edid_size / 4; i++) {