diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-16 10:04:41 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-18 07:08:35 +0000 |
commit | 3457df1730bf4446fa0e0042e43cc0c0e7bd1073 (patch) | |
tree | 1977e05f494ad6a4888722dfd8c4d35e81df344b /src | |
parent | dc2e7c6e0fb1331a7808c226992c71e07f9ca7bd (diff) | |
download | coreboot-3457df1730bf4446fa0e0042e43cc0c0e7bd1073.tar.xz |
sb/intel/common: Properly guard USB debug
The declarations in usb_debug.c needs to be guarded in order to not
conflict with other chipsets.
Change-Id: I84c3401b9419f2878c2cfdf81147fa854018f9ae
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36878
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Mike Banon <mikebdp2@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/southbridge/intel/bd82x6x/Kconfig | 1 | ||||
-rw-r--r-- | src/southbridge/intel/common/Kconfig | 4 | ||||
-rw-r--r-- | src/southbridge/intel/common/Makefile.inc | 6 | ||||
-rw-r--r-- | src/southbridge/intel/fsp_rangeley/Kconfig | 2 | ||||
-rw-r--r-- | src/southbridge/intel/i82801dx/Kconfig | 2 | ||||
-rw-r--r-- | src/southbridge/intel/i82801gx/Kconfig | 2 | ||||
-rw-r--r-- | src/southbridge/intel/i82801ix/Kconfig | 2 | ||||
-rw-r--r-- | src/southbridge/intel/i82801jx/Kconfig | 2 | ||||
-rw-r--r-- | src/southbridge/intel/ibexpeak/Kconfig | 2 | ||||
-rw-r--r-- | src/southbridge/intel/lynxpoint/Kconfig | 1 |
10 files changed, 15 insertions, 9 deletions
diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig index f561fe53fb..c01e2b9eed 100644 --- a/src/southbridge/intel/bd82x6x/Kconfig +++ b/src/southbridge/intel/bd82x6x/Kconfig @@ -47,6 +47,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy select SOUTHBRIDGE_INTEL_COMMON_SMM select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG + select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG config EHCI_BAR hex diff --git a/src/southbridge/intel/common/Kconfig b/src/southbridge/intel/common/Kconfig index 57c0dbe19f..18bcd2e4a6 100644 --- a/src/southbridge/intel/common/Kconfig +++ b/src/southbridge/intel/common/Kconfig @@ -46,6 +46,10 @@ config SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT config SOUTHBRIDGE_INTEL_COMMON_FINALIZE bool +config SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG + def_bool n + select HAVE_USBDEBUG + config INTEL_DESCRIPTOR_MODE_CAPABLE def_bool n help diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc index 9ff0ebc5a1..c8521e1b5a 100644 --- a/src/southbridge/intel/common/Makefile.inc +++ b/src/southbridge/intel/common/Makefile.inc @@ -28,9 +28,9 @@ ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG) += watchdog.c all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE) += pmbase.c smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE) += pmbase.c -bootblock-$(CONFIG_USBDEBUG) += usb_debug.c -romstage-$(CONFIG_USBDEBUG) += usb_debug.c -ramstage-$(CONFIG_USBDEBUG) += usb_debug.c +bootblock-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG) += usb_debug.c +romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG) += usb_debug.c +ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG) += usb_debug.c bootblock-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c diff --git a/src/southbridge/intel/fsp_rangeley/Kconfig b/src/southbridge/intel/fsp_rangeley/Kconfig index 56c02b534d..076a2bce55 100644 --- a/src/southbridge/intel/fsp_rangeley/Kconfig +++ b/src/southbridge/intel/fsp_rangeley/Kconfig @@ -23,7 +23,6 @@ config SOUTH_BRIDGE_OPTIONS # dummy def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES select IOAPIC - select HAVE_USBDEBUG select USE_WATCHDOG_ON_BOOT select PCIEXP_ASPM select PCIEXP_COMMON_CLOCK @@ -34,6 +33,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy select SOUTHBRIDGE_INTEL_COMMON_PMBASE select SOUTHBRIDGE_INTEL_COMMON_RTC select SOUTHBRIDGE_INTEL_COMMON_RESET + select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG config EHCI_BAR hex diff --git a/src/southbridge/intel/i82801dx/Kconfig b/src/southbridge/intel/i82801dx/Kconfig index 916560a87a..5dad02ef2f 100644 --- a/src/southbridge/intel/i82801dx/Kconfig +++ b/src/southbridge/intel/i82801dx/Kconfig @@ -19,10 +19,10 @@ config SOUTHBRIDGE_INTEL_I82801DX select ACPI_INTEL_HARDWARE_SLEEP_VALUES select IOAPIC select HAVE_SMI_HANDLER - select HAVE_USBDEBUG select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_RTC select SOUTHBRIDGE_INTEL_COMMON_RESET + select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG select HAVE_POWER_STATE_AFTER_FAILURE select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig index bf9880ac27..2d95fc2371 100644 --- a/src/southbridge/intel/i82801gx/Kconfig +++ b/src/southbridge/intel/i82801gx/Kconfig @@ -17,7 +17,6 @@ config SOUTHBRIDGE_INTEL_I82801GX bool select ACPI_INTEL_HARDWARE_SLEEP_VALUES select IOAPIC - select HAVE_USBDEBUG select USE_WATCHDOG_ON_BOOT select HAVE_SMI_HANDLER select COMMON_FADT @@ -33,6 +32,7 @@ config SOUTHBRIDGE_INTEL_I82801GX select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG select SOUTHBRIDGE_INTEL_COMMON_RTC select SOUTHBRIDGE_INTEL_COMMON_RESET + select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG if SOUTHBRIDGE_INTEL_I82801GX diff --git a/src/southbridge/intel/i82801ix/Kconfig b/src/southbridge/intel/i82801ix/Kconfig index cd2f76d9b5..836397822a 100644 --- a/src/southbridge/intel/i82801ix/Kconfig +++ b/src/southbridge/intel/i82801ix/Kconfig @@ -23,7 +23,6 @@ config SOUTHBRIDGE_INTEL_I82801IX select SOUTHBRIDGE_INTEL_COMMON_RTC select SOUTHBRIDGE_INTEL_COMMON_RESET select IOAPIC - select HAVE_USBDEBUG select USE_WATCHDOG_ON_BOOT select HAVE_SMI_HANDLER select HAVE_USBDEBUG_OPTIONS @@ -33,6 +32,7 @@ config SOUTHBRIDGE_INTEL_I82801IX select INTEL_DESCRIPTOR_MODE_CAPABLE select ACPI_INTEL_HARDWARE_SLEEP_VALUES select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG + select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG if SOUTHBRIDGE_INTEL_I82801IX diff --git a/src/southbridge/intel/i82801jx/Kconfig b/src/southbridge/intel/i82801jx/Kconfig index 7f44fcfc1d..161290f852 100644 --- a/src/southbridge/intel/i82801jx/Kconfig +++ b/src/southbridge/intel/i82801jx/Kconfig @@ -24,7 +24,6 @@ config SOUTHBRIDGE_INTEL_I82801JX select SOUTHBRIDGE_INTEL_COMMON_RTC select SOUTHBRIDGE_INTEL_COMMON_RESET select IOAPIC - select HAVE_USBDEBUG select USE_WATCHDOG_ON_BOOT select HAVE_SMI_HANDLER select HAVE_USBDEBUG_OPTIONS @@ -36,6 +35,7 @@ config SOUTHBRIDGE_INTEL_I82801JX select HAVE_POWER_STATE_AFTER_FAILURE select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG + select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG if SOUTHBRIDGE_INTEL_I82801JX diff --git a/src/southbridge/intel/ibexpeak/Kconfig b/src/southbridge/intel/ibexpeak/Kconfig index c84a66d313..f9723fb2d8 100644 --- a/src/southbridge/intel/ibexpeak/Kconfig +++ b/src/southbridge/intel/ibexpeak/Kconfig @@ -22,7 +22,6 @@ config SOUTH_BRIDGE_OPTIONS # dummy def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES select IOAPIC - select HAVE_USBDEBUG select HAVE_SMI_HANDLER select USE_WATCHDOG_ON_BOOT select PCIEXP_ASPM @@ -45,6 +44,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy select HAVE_POWER_STATE_AFTER_FAILURE select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG + select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG config EHCI_BAR hex diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig index 95b9f625f2..ef071f28ed 100644 --- a/src/southbridge/intel/lynxpoint/Kconfig +++ b/src/southbridge/intel/lynxpoint/Kconfig @@ -45,6 +45,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy select HAVE_POWER_STATE_AFTER_FAILURE select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG + select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG config INTEL_LYNXPOINT_LP bool |