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authorGabe Black <gabeblack@google.com>2013-05-18 23:06:47 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-07-10 21:42:41 +0200
commit39fda6d9159461f04f74259919281baca7cb4393 (patch)
tree8fd7c5a0709c2a65f9c9e82b57ee5844ff018d06 /src
parent986162b25f1038e5425713883310ba6002859d7d (diff)
downloadcoreboot-39fda6d9159461f04f74259919281baca7cb4393.tar.xz
exynos5250: Clear the framebuffer before making it uncacheable.
If we clear the framebuffer and then flush it back to memory using cache operations, the writes are going to be full cachelines at a time. If we make it uncacheable first, the writes will be serialized writes of whatever sized chunks memset uses, probably 4 bytes or less. Change-Id: I1b81731cfed00ae091ba6357451ab186d16f559e Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3655 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/cpu/samsung/exynos5250/cpu.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/cpu/samsung/exynos5250/cpu.c b/src/cpu/samsung/exynos5250/cpu.c
index d2a6df7fc4..3687ea859b 100644
--- a/src/cpu/samsung/exynos5250/cpu.c
+++ b/src/cpu/samsung/exynos5250/cpu.c
@@ -97,6 +97,8 @@ static void exynos_displayport_init(device_t dev)
lcdbase = (uintptr_t)cbmem_add(CBMEM_ID_CONSOLE, fb_size);
printk(BIOS_SPEW, "LCD framebuffer base is %p\n", (void *)(lcdbase));
+ memset((void *)lcdbase, 0, fb_size); /* clear the framebuffer */
+
/*
* We need to clean and invalidate the framebuffer region and disable
* caching as well. We assume that our dcache <--> memory address
@@ -114,7 +116,6 @@ static void exynos_displayport_init(device_t dev)
mmio_resource(dev, 1, lcdbase/KiB, (fb_size + KiB - 1)/KiB);
printk(BIOS_DEBUG,
"Initializing Exynos VGA, base %p\n", (void *)lcdbase);
- memset((void *)lcdbase, 0, fb_size); /* clear the framebuffer */
ret = lcd_ctrl_init(fb_size, &panel, (void *)lcdbase);
}