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authorMarc Jones <marcj303@gmail.com>2011-05-15 23:13:54 +0000
committerMarc Jones <marc.jones@amd.com>2011-05-15 23:13:54 +0000
commit44d3c3dade57b3564bcf6bcafc490756d9f45d44 (patch)
tree7eb49376620a25456d409052999440ee3269595a /src
parent16c8e37a2d4e5164742c605b5894d31d9cbab3e1 (diff)
downloadcoreboot-44d3c3dade57b3564bcf6bcafc490756d9f45d44.tar.xz
Remove multiple mmconf settings and just use kconfig setting.
Signed-off-by: Marc Jones <marcj303@gmail.com> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6596 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/amd/persimmon/dsdt.asl2
-rw-r--r--src/vendorcode/amd/cimx/sb800/OEM.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/amd/persimmon/dsdt.asl b/src/mainboard/amd/persimmon/dsdt.asl
index 6a523cd444..c7ceb02f2c 100644
--- a/src/mainboard/amd/persimmon/dsdt.asl
+++ b/src/mainboard/amd/persimmon/dsdt.asl
@@ -36,7 +36,7 @@ DefinitionBlock (
Name(PBAD, 0x0) /* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
Name(PBLN, 0x0) /* Length of BIOS area */
- Name(PCBA, 0xF8000000) /* Base address of PCIe config space */
+ Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS) /* Base address of PCIe config space */
Name(HPBA, 0xFED00000) /* Base address of HPET table */
Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
diff --git a/src/vendorcode/amd/cimx/sb800/OEM.h b/src/vendorcode/amd/cimx/sb800/OEM.h
index 6a79f325a1..6ca4271c1a 100644
--- a/src/vendorcode/amd/cimx/sb800/OEM.h
+++ b/src/vendorcode/amd/cimx/sb800/OEM.h
@@ -48,7 +48,7 @@
#ifdef MOVE_PCIEBAR_TO_F0000000
#define PCIEX_BASE_ADDRESS 0xF7000000
#else
- #define PCIEX_BASE_ADDRESS 0xF8000000
+ #define PCIEX_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
#endif
/**