diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2013-03-22 22:16:58 -0500 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-03-29 19:54:08 +0100 |
| commit | 4fa5fa5088503ff5c168b4fb8d548dd90034d29e (patch) | |
| tree | 8811faa2b0e3bf5dd4bbc0831b8c8e2e92c3dc3f /src | |
| parent | a75561415e75d3a4dc813fc061140570e39b7078 (diff) | |
| download | coreboot-4fa5fa5088503ff5c168b4fb8d548dd90034d29e.tar.xz | |
resources: introduce IORESOURCE_WRCOMB
Certain MMIO resources can be set to a write-combining cacheable
mode to increase performance. Typical resources that use this would
be graphics memory.
Change-Id: Icd96c720f86f7e2f19a6461bb23cb323124eb68e
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2891
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/include/device/resource.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/include/device/resource.h b/src/include/device/resource.h index 6b66605a6a..4bd9698e2c 100644 --- a/src/include/device/resource.h +++ b/src/include/device/resource.h @@ -21,7 +21,7 @@ * to the bus below. */ #define IORESOURCE_BRIDGE 0x00080000 /* The IO resource has a bus below it. */ - +#define IORESOURCE_WRCOMB 0x00100000 /* Write combining resource. */ #define IORESOURCE_RESERVE 0x10000000 /* The resource needs to be reserved in the coreboot table */ #define IORESOURCE_STORED 0x20000000 /* The IO resource assignment has been stored in the device */ #define IORESOURCE_ASSIGNED 0x40000000 /* An IO resource that has been assigned a value */ |