diff options
| author | Werner Zeh <werner.zeh@siemens.com> | 2018-11-21 10:38:12 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-11-23 11:28:01 +0000 |
| commit | 52c58929fd8d9011e7990c042418624b567ffa1b (patch) | |
| tree | 86cb63615dd58f4e7c97a8c3039aa8959fb47a57 /src | |
| parent | 6d19a20f5fb46956d4324dff28ed4b59dc7776a3 (diff) | |
| download | coreboot-52c58929fd8d9011e7990c042418624b567ffa1b.tar.xz | |
intelblocks/cpu: Add function to set CPU clock to minimum value
Provide a library function to set the CPU frequency to minimum
value. This will result in the lowest possible CPU clock with
the lowest possible power consumption. This can be useful in mobile
devices where the power dissipation is limited.
This setting can be overruled by the OS if it has an p-state driver
which can adjust the clock to it's need.
Change-Id: I817095b13ab8cbaab82f25c72947b00ee854d549
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/29771
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/common/block/cpu/cpulib.c | 20 | ||||
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/cpulib.h | 8 |
2 files changed, 28 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c index 0c042df8b2..f2142d93cc 100644 --- a/src/soc/intel/common/block/cpu/cpulib.c +++ b/src/soc/intel/common/block/cpu/cpulib.c @@ -3,6 +3,7 @@ * * Copyright (C) 2014 Google Inc. * Copyright (C) 2015-2018 Intel Corporation. + * Copyright (C) 2018 Siemens AG * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -141,6 +142,25 @@ void cpu_set_p_state_to_max_non_turbo_ratio(void) } /* + * Set PERF_CTL MSR (0x199) P_Req (14:8 bits) with the value + * for maximum efficiency. This value is reported in PLATFORM_INFO MSR (0xCE) + * in Bits 47:40 and is extracted with cpu_get_min_ratio(). + */ +void cpu_set_p_state_to_min_clock_ratio(void) +{ + uint32_t min_ratio; + msr_t perf_ctl; + + /* Read the minimum ratio for the best efficiency. */ + min_ratio = cpu_get_min_ratio(); + perf_ctl.lo = (min_ratio << 8) & 0xff00; + perf_ctl.hi = 0; + wrmsr(IA32_PERF_CTL, perf_ctl); + printk(BIOS_DEBUG, "CPU: frequency set to %u MHz\n", + (min_ratio * CONFIG_CPU_BCLK_MHZ)); +} + +/* * Get the Burst/Turbo Mode State from MSR IA32_MISC_ENABLE 0x1A0 * Bit 38 - TURBO_MODE_DISABLE Bit to get state ENABLED / DISABLED. * Also check for the cpuid 0x6 to check whether Burst mode unsupported. diff --git a/src/soc/intel/common/block/include/intelblocks/cpulib.h b/src/soc/intel/common/block/include/intelblocks/cpulib.h index 88f04b439a..0d51146752 100644 --- a/src/soc/intel/common/block/include/intelblocks/cpulib.h +++ b/src/soc/intel/common/block/include/intelblocks/cpulib.h @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2017 Intel Corporation. + * Copyright (C) 2018 Siemens AG * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -73,6 +74,13 @@ void cpu_set_p_state_to_nominal_tdp_ratio(void); void cpu_set_p_state_to_max_non_turbo_ratio(void); /* + * Set PERF_CTL MSR (0x199) P_Req (14:8 bits) with the value + * for maximum efficiency. This value is reported in PLATFORM_INFO MSR (0xCE) + * in Bits 47:40 and is extracted with cpu_get_min_ratio(). + */ +void cpu_set_p_state_to_min_clock_ratio(void); + +/* * Get the Burst/Turbo Mode State from MSR IA32_MISC_ENABLE 0x1A0 * Bit 38 - TURBO_MODE_DISABLE Bit to get state ENABLED / DISABLED. * Also check for the cpuid 0x6 to check whether Burst mode unsupported. |