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authorJames Ye <jye836@gmail.com>2019-02-01 13:29:02 +1100
committerAlexander Couzens <lynxis@fe80.eu>2019-09-27 22:27:45 +0000
commit59de112995523f52cedbdbd5d1dd770f6f53b5d3 (patch)
tree5ced11a8fdcc09f5082cba3ddf99ac359d0d9c71 /src
parentb33a2b05afe2b309da5a608f3d17ffcf112c120a (diff)
downloadcoreboot-59de112995523f52cedbdbd5d1dd770f6f53b5d3.tar.xz
mb/lenovo/x131e: correct USB port config
Based on schematic and register dumps. Change-Id: I91fc47022988cfe986fb8c1ed21dc073ee7d16bc Signed-off-by: James Ye <jye836@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31365 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/lenovo/x131e/romstage.c28
1 files changed, 14 insertions, 14 deletions
diff --git a/src/mainboard/lenovo/x131e/romstage.c b/src/mainboard/lenovo/x131e/romstage.c
index 79a2276fd0..5fc5df6b85 100644
--- a/src/mainboard/lenovo/x131e/romstage.c
+++ b/src/mainboard/lenovo/x131e/romstage.c
@@ -33,20 +33,20 @@ void mainboard_rcba_config(void)
}
const struct southbridge_usb_port mainboard_usb_ports[] = {
- {1, 1, 0},
- {1, 1, 0},
- {0, 1, 1},
- {1, 1, 1},
- {1, 0, 2},
- {1, 0, 2},
- {0, 0, 3},
- {0, 0, 3},
- {0, 1, 4},
- {1, 1, 4},
- {0, 0, 5},
- {0, 0, 5},
- {0, 0, 6},
- {1, 0, 6},
+ {1, 1, 0}, /* P0: USB 3.0 1 (OC0) */
+ {1, 1, 0}, /* P1: USB 3.0 2 (OC0) */
+ {0, 0, 0},
+ {1, 1, -1}, /* P3: Camera (no OC) */
+ {1, 0, -1}, /* P4: WLAN (no OC) */
+ {1, 0, -1}, /* P5: WWAN (no OC) */
+ {0, 0, 0},
+ {0, 0, 0},
+ {0, 0, 0},
+ {1, 1, 4}, /* P9: USB 2.0 (AUO4) (OC4) */
+ {0, 0, 0},
+ {0, 0, 0},
+ {0, 0, 0},
+ {1, 0, -1}, /* P13: Bluetooth (no OC) */
};
void mainboard_get_spd(spd_raw_data *spd, bool id_only)