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| author | Iru Cai <mytbk920423@gmail.com> | 2020-12-15 22:36:23 +0800 |
|---|---|---|
| committer | Iru Cai <mytbk920423@gmail.com> | 2020-12-28 21:30:33 +0800 |
| commit | 5e53c0ddf2f486c233ad20069ac477efcc73458c (patch) | |
| tree | 92a7f157896b636cc6e21b3f57235f96004b7f18 /src | |
| parent | 75d86db4aad8ce06dc5bf7bae6c056e9f47f4445 (diff) | |
| download | coreboot-5e53c0ddf2f486c233ad20069ac477efcc73458c.tar.xz | |
e7240_bdw: init mec5055
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/dell/latitude_e7240_bdw/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/mainboard/dell/latitude_e7240_bdw/bootblock.c | 13 | ||||
| -rw-r--r-- | src/mainboard/dell/latitude_e7240_bdw/romstage.c | 14 |
3 files changed, 14 insertions, 14 deletions
diff --git a/src/mainboard/dell/latitude_e7240_bdw/Makefile.inc b/src/mainboard/dell/latitude_e7240_bdw/Makefile.inc index 5fbd701e53..bea4f370c0 100644 --- a/src/mainboard/dell/latitude_e7240_bdw/Makefile.inc +++ b/src/mainboard/dell/latitude_e7240_bdw/Makefile.inc @@ -1,4 +1,3 @@ -bootblock-y += bootblock.c romstage-y += gpio.c romstage-y += pei_data.c ramstage-y += pei_data.c diff --git a/src/mainboard/dell/latitude_e7240_bdw/bootblock.c b/src/mainboard/dell/latitude_e7240_bdw/bootblock.c deleted file mode 100644 index 62f7fc2aa0..0000000000 --- a/src/mainboard/dell/latitude_e7240_bdw/bootblock.c +++ /dev/null @@ -1,13 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <device/pci_ops.h> -#include <ec/dell/mec5055/mec5055.h> -#include <southbridge/intel/lynxpoint/pch.h> - -void mainboard_config_superio(void) -{ - /* port 0x910 and 0x911 is needed to initialize the EC */ - pci_write_config32(PCH_LPC_DEV, LPC_GEN2_DEC, 0x007c0901); - mec5055_early_init(); - pci_write_config32(PCH_LPC_DEV, LPC_GEN2_DEC, 0x005c0921); -} diff --git a/src/mainboard/dell/latitude_e7240_bdw/romstage.c b/src/mainboard/dell/latitude_e7240_bdw/romstage.c index 8fc2f9eaf7..5f8e22e423 100644 --- a/src/mainboard/dell/latitude_e7240_bdw/romstage.c +++ b/src/mainboard/dell/latitude_e7240_bdw/romstage.c @@ -1,11 +1,25 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <device/pci_ops.h> +#include <ec/dell/mec5055/mec5055.h> + +#include <soc/pci_devs.h> #include <soc/pei_data.h> +#include <soc/lpc.h> #include <soc/pei_wrapper.h> #include <soc/romstage.h> +static void mainboard_config_superio(void) +{ + /* port 0x910 and 0x911 is needed to initialize the EC */ + pci_write_config32(PCH_DEV_LPC, LPC_GEN2_DEC, 0x007c0901); + mec5055_early_init(); + pci_write_config32(PCH_DEV_LPC, LPC_GEN2_DEC, 0x005c0921); +} void mainboard_pre_raminit(struct romstage_params *rp) { + mainboard_config_superio(); + /* Fill out PEI DATA */ mainboard_fill_pei_data(&rp->pei_data); } |