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authorStefan Reinauer <reinauer@chromium.org>2015-07-29 23:54:38 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-10-30 18:24:39 +0100
commit5fa4cb6d32b469ef8312de0c12ec648c085b9a1f (patch)
tree7d25078fb59f9861880a4aaf1d9f807531e36637 /src
parentd91ddc8d3181b8ab23726c8e744093f39473c202 (diff)
downloadcoreboot-5fa4cb6d32b469ef8312de0c12ec648c085b9a1f.tar.xz
cpu/amd: Fix cbtypes.h to match UINTN convention
There are some inconsistencies in AMDs APIs between the coreboot code and the vendorcode code. Unify the API. UINTN maps to uintptr_t in UEFI land. Do the same here. Also switch the other UEFI types to map to fixed size types. Change-Id: Ib46893c7cd5368eae43e9cda30eed7398867ac5b Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Signed-off-by: Scott Duplichan <scott@notabs.org> Reviewed-on: http://review.coreboot.org/10601 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/include/cpu/amd/common/cbtypes.h22
-rw-r--r--src/mainboard/amd/dinar/rd890_cfg.c2
-rw-r--r--src/mainboard/amd/dinar/sb700_cfg.c2
-rw-r--r--src/mainboard/supermicro/h8qgi/rd890_cfg.c2
-rw-r--r--src/mainboard/supermicro/h8scm/rd890_cfg.c2
-rw-r--r--src/mainboard/tyan/s8226/rd890_cfg.c2
-rw-r--r--src/northbridge/amd/cimx/rd890/amd.h2
-rw-r--r--src/vendorcode/amd/agesa/common/Porting.h24
-rw-r--r--src/vendorcode/amd/cimx/sb700/SBTYPE.h2
-rw-r--r--src/vendorcode/amd/cimx/sb800/AMDSBLIB.h4
-rw-r--r--src/vendorcode/amd/cimx/sb900/AmdSbLib.h4
-rw-r--r--src/vendorcode/amd/cimx/sb900/SbDef.h2
-rw-r--r--src/vendorcode/amd/cimx/sb900/SbMain.c2
-rw-r--r--src/vendorcode/amd/cimx/sb900/SbSubFun.h5
14 files changed, 44 insertions, 33 deletions
diff --git a/src/include/cpu/amd/common/cbtypes.h b/src/include/cpu/amd/common/cbtypes.h
index 346f1a31a4..54da783c75 100644
--- a/src/include/cpu/amd/common/cbtypes.h
+++ b/src/include/cpu/amd/common/cbtypes.h
@@ -20,16 +20,20 @@
#ifndef _CBTYPES_H_
#define _CBTYPES_H_
-typedef signed long long __int64;
+/* Map coreboot stdint types to AGESA types. */
+
+#include <stdint.h>
+
+typedef int64_t __int64;
typedef void VOID;
-typedef unsigned int UINTN;
-typedef signed char CHAR8;
-typedef unsigned char UINT8;
-typedef unsigned short UINT16;
-typedef unsigned int UINT32;
-typedef signed int INT32;
-typedef unsigned long long UINT64;
-typedef unsigned char BOOLEAN;
+typedef uintptr_t UINTN;
+typedef char CHAR8;
+typedef uint8_t UINT8;
+typedef uint16_t UINT16;
+typedef uint32_t UINT32;
+typedef int32_t INT32;
+typedef uint64_t UINT64;
+typedef uint8_t BOOLEAN;
#define DMSG_SB_TRACE 0x02
#define TRACE(Arguments)
diff --git a/src/mainboard/amd/dinar/rd890_cfg.c b/src/mainboard/amd/dinar/rd890_cfg.c
index 06b335f134..9689b9d53d 100644
--- a/src/mainboard/amd/dinar/rd890_cfg.c
+++ b/src/mainboard/amd/dinar/rd890_cfg.c
@@ -226,7 +226,7 @@ void rd890_cimx_config(AMD_NB_CONFIG_BLOCK *pConfig, NB_CONFIG *nbConfig, HT_CON
pConfig->NumberOfNorthbridges = MAX_NB_COUNT - 1; /* Support limited to primary NB only located at 0:0:0 */
//pConfig->StandardHeader.ImageBasePtr = CIMX_B2_IMAGE_BASE_ADDRESS;
pConfig->StandardHeader.PcieBasePtr = (VOID *)PCIEX_BASE_ADDRESS;
- pConfig->StandardHeader.CalloutPtr = &rd890_callout_entry;
+ pConfig->StandardHeader.CalloutPtr = (CALLOUT_ENTRY)&rd890_callout_entry;
/*
* PCI Address to Access NB. Depends on HT topology and configuration for multi NB platform.
diff --git a/src/mainboard/amd/dinar/sb700_cfg.c b/src/mainboard/amd/dinar/sb700_cfg.c
index 53e93ce811..2ce47ce2d1 100644
--- a/src/mainboard/amd/dinar/sb700_cfg.c
+++ b/src/mainboard/amd/dinar/sb700_cfg.c
@@ -135,7 +135,7 @@ void sb700_cimx_config(AMDSBCFG *sb_config)
#ifndef __PRE_RAM__
/* ramstage cimx config here */
if (!sb_config->StdHeader.pCallBack) {
- sb_config->StdHeader.pCallBack = sb700_callout_entry;
+ sb_config->StdHeader.pCallBack = (CIM_HOOK_ENTRY)&sb700_callout_entry;
}
//sb_config->
diff --git a/src/mainboard/supermicro/h8qgi/rd890_cfg.c b/src/mainboard/supermicro/h8qgi/rd890_cfg.c
index 147d32bc31..a337714c62 100644
--- a/src/mainboard/supermicro/h8qgi/rd890_cfg.c
+++ b/src/mainboard/supermicro/h8qgi/rd890_cfg.c
@@ -226,7 +226,7 @@ void rd890_cimx_config(AMD_NB_CONFIG_BLOCK *pConfig, NB_CONFIG *nbConfig, HT_CON
pConfig->NumberOfNorthbridges = MAX_NB_COUNT - 1; /* Support limited to primary NB only located at 0:0:0 */
//pConfig->StandardHeader.ImageBasePtr = CIMX_B2_IMAGE_BASE_ADDRESS;
pConfig->StandardHeader.PcieBasePtr = (VOID *)PCIEX_BASE_ADDRESS;
- pConfig->StandardHeader.CalloutPtr = &rd890_callout_entry;
+ pConfig->StandardHeader.CalloutPtr = (CALLOUT_ENTRY)&rd890_callout_entry;
/*
* PCI Address to Access NB. Depends on HT topology and configuration for multi NB platform.
diff --git a/src/mainboard/supermicro/h8scm/rd890_cfg.c b/src/mainboard/supermicro/h8scm/rd890_cfg.c
index 147d32bc31..a337714c62 100644
--- a/src/mainboard/supermicro/h8scm/rd890_cfg.c
+++ b/src/mainboard/supermicro/h8scm/rd890_cfg.c
@@ -226,7 +226,7 @@ void rd890_cimx_config(AMD_NB_CONFIG_BLOCK *pConfig, NB_CONFIG *nbConfig, HT_CON
pConfig->NumberOfNorthbridges = MAX_NB_COUNT - 1; /* Support limited to primary NB only located at 0:0:0 */
//pConfig->StandardHeader.ImageBasePtr = CIMX_B2_IMAGE_BASE_ADDRESS;
pConfig->StandardHeader.PcieBasePtr = (VOID *)PCIEX_BASE_ADDRESS;
- pConfig->StandardHeader.CalloutPtr = &rd890_callout_entry;
+ pConfig->StandardHeader.CalloutPtr = (CALLOUT_ENTRY)&rd890_callout_entry;
/*
* PCI Address to Access NB. Depends on HT topology and configuration for multi NB platform.
diff --git a/src/mainboard/tyan/s8226/rd890_cfg.c b/src/mainboard/tyan/s8226/rd890_cfg.c
index 147d32bc31..a337714c62 100644
--- a/src/mainboard/tyan/s8226/rd890_cfg.c
+++ b/src/mainboard/tyan/s8226/rd890_cfg.c
@@ -226,7 +226,7 @@ void rd890_cimx_config(AMD_NB_CONFIG_BLOCK *pConfig, NB_CONFIG *nbConfig, HT_CON
pConfig->NumberOfNorthbridges = MAX_NB_COUNT - 1; /* Support limited to primary NB only located at 0:0:0 */
//pConfig->StandardHeader.ImageBasePtr = CIMX_B2_IMAGE_BASE_ADDRESS;
pConfig->StandardHeader.PcieBasePtr = (VOID *)PCIEX_BASE_ADDRESS;
- pConfig->StandardHeader.CalloutPtr = &rd890_callout_entry;
+ pConfig->StandardHeader.CalloutPtr = (CALLOUT_ENTRY)&rd890_callout_entry;
/*
* PCI Address to Access NB. Depends on HT topology and configuration for multi NB platform.
diff --git a/src/northbridge/amd/cimx/rd890/amd.h b/src/northbridge/amd/cimx/rd890/amd.h
index 5e69ac40a2..ade5a31c61 100644
--- a/src/northbridge/amd/cimx/rd890/amd.h
+++ b/src/northbridge/amd/cimx/rd890/amd.h
@@ -41,7 +41,7 @@
#define OUT
#define IMAGE_SIGNATURE 'DMA$'
-typedef UINTN AGESA_STATUS;
+typedef UINT32 AGESA_STATUS;
#define AGESA_SUCCESS ((AGESA_STATUS) 0x0)
diff --git a/src/vendorcode/amd/agesa/common/Porting.h b/src/vendorcode/amd/agesa/common/Porting.h
index 11b8e71c2e..4e3aede952 100644
--- a/src/vendorcode/amd/agesa/common/Porting.h
+++ b/src/vendorcode/amd/agesa/common/Porting.h
@@ -216,6 +216,7 @@
#elif defined __GNUC__
+ #include <stdint.h>
#define IN
#define OUT
#define STATIC static
@@ -228,17 +229,20 @@
#define CALLCONV
#define _16BYTE_ALIGN __attribute__ ((aligned (16)))
+
+ // Create the universal 32, 16, and 8-bit data types
typedef unsigned char BOOLEAN;
- typedef signed char INT8;
- typedef signed short INT16;
- typedef signed long INT32;
- typedef char CHAR8;
- typedef unsigned char UINT8;
- typedef unsigned short UINT16;
- typedef unsigned long UINT32;
- typedef unsigned long UINTN;
- typedef unsigned long long UINT64;
- typedef long long INT64;
+ typedef uintptr_t UINTN;
+ typedef int64_t INT64;
+ typedef uint64_t UINT64;
+ typedef int32_t INT32;
+ typedef uint32_t UINT32;
+ typedef int16_t INT16;
+ typedef uint16_t UINT16;
+ typedef int8_t INT8;
+ typedef uint8_t UINT8;
+ typedef char CHAR8;
+ typedef unsigned short CHAR16;
typedef void VOID;
//typedef unsigned long size_t;
diff --git a/src/vendorcode/amd/cimx/sb700/SBTYPE.h b/src/vendorcode/amd/cimx/sb700/SBTYPE.h
index faeae5d5a8..3dc571f0f7 100644
--- a/src/vendorcode/amd/cimx/sb700/SBTYPE.h
+++ b/src/vendorcode/amd/cimx/sb700/SBTYPE.h
@@ -32,7 +32,7 @@
#pragma pack(push,1)
-typedef UINT32 (*CIM_HOOK_ENTRY)(UINT32 Param1, UINTN Param2, void* pConfig);
+typedef UINT32 (*CIM_HOOK_ENTRY)(UINT32 Param1, UINT32 Param2, void* pConfig);
typedef void (*SMM_SERVICE_ROUTINE) (void);
typedef struct _STDCFG{
diff --git a/src/vendorcode/amd/cimx/sb800/AMDSBLIB.h b/src/vendorcode/amd/cimx/sb800/AMDSBLIB.h
index 9e50bf94cb..a50cda4427 100644
--- a/src/vendorcode/amd/cimx/sb800/AMDSBLIB.h
+++ b/src/vendorcode/amd/cimx/sb800/AMDSBLIB.h
@@ -46,6 +46,8 @@
#ifndef __VENDORCODE_AMD_CIMX_SB800_AMDSBLIB_H__
#define __VENDORCODE_AMD_CIMX_SB800_AMDSBLIB_H__
+#include <cpu/amd/common/cbtypes.h>
+
//AMDSBLIB Routines
/**
@@ -105,7 +107,7 @@ AGESA_STATUS AmdSbDispatcher (IN void *pConfig);
* @param[in] Length - Data length
*
*/
-void AmdSbCopyMem (IN void* pDest, IN void* pSource, IN unsigned int Length);
+void AmdSbCopyMem (IN void* pDest, IN void* pSource, IN UINTN Length);
/* SB800 CIMx and AGESA V5 can share lib functions */
diff --git a/src/vendorcode/amd/cimx/sb900/AmdSbLib.h b/src/vendorcode/amd/cimx/sb900/AmdSbLib.h
index cf9589bfbf..47a7048560 100644
--- a/src/vendorcode/amd/cimx/sb900/AmdSbLib.h
+++ b/src/vendorcode/amd/cimx/sb900/AmdSbLib.h
@@ -69,10 +69,10 @@ unsigned char getEfuseByte (IN unsigned char Index);
AGESA_STATUS AmdSbDispatcher (IN void *pConfig);
/**< AmdSbCopyMem - Reserved */
-void AmdSbCopyMem (IN void* pDest, IN void* pSource, IN unsigned int Length);
+void AmdSbCopyMem (IN void* pDest, IN void* pSource, IN UINTN Length);
/**< GetRomSigPtr - Reserved */
-void* GetRomSigPtr (IN unsigned int* RomSigPtr);
+void* GetRomSigPtr (IN UINTN * RomSigPtr);
/**< RWXhciIndReg - Reserved */
void RWXhciIndReg (IN unsigned int Index, IN unsigned int AndMask, IN unsigned int OrMask);
diff --git a/src/vendorcode/amd/cimx/sb900/SbDef.h b/src/vendorcode/amd/cimx/sb900/SbDef.h
index 91fec4aa21..b600627e09 100644
--- a/src/vendorcode/amd/cimx/sb900/SbDef.h
+++ b/src/vendorcode/amd/cimx/sb900/SbDef.h
@@ -71,7 +71,7 @@ void
MemoryCopy (
IN unsigned char *Dest,
IN unsigned char *Source,
- IN unsigned int Size
+ IN unsigned long Size
);
//AMD Library Routines (PCILIB.C)
diff --git a/src/vendorcode/amd/cimx/sb900/SbMain.c b/src/vendorcode/amd/cimx/sb900/SbMain.c
index 958e44b35e..7c9dbbdff6 100644
--- a/src/vendorcode/amd/cimx/sb900/SbMain.c
+++ b/src/vendorcode/amd/cimx/sb900/SbMain.c
@@ -278,7 +278,7 @@ sbSmmAcpiOn (
UINTN
CallBackToOEM (
IN UINT32 Func,
- IN UINT32 Data,
+ IN UINTN Data,
IN AMDSBCFG* pConfig
)
{
diff --git a/src/vendorcode/amd/cimx/sb900/SbSubFun.h b/src/vendorcode/amd/cimx/sb900/SbSubFun.h
index 447f5c9603..68574a77dc 100644
--- a/src/vendorcode/amd/cimx/sb900/SbSubFun.h
+++ b/src/vendorcode/amd/cimx/sb900/SbSubFun.h
@@ -40,6 +40,7 @@
;
;*********************************************************************************/
+#include <cpu/amd/common/cbtypes.h>
// Southbridge SBMAIN Routines
/**
@@ -127,7 +128,7 @@ void sbSmmAcpiOn (IN AMDSBCFG* pConfig);
* @param[in] Data Callback specific data.
* @param[in] pConfig Southbridge configuration structure pointer.
*/
-unsigned int CallBackToOEM (IN unsigned int Func, IN unsigned int Data, IN AMDSBCFG* pConfig);
+UINTN CallBackToOEM (IN unsigned int Func, IN UINTN Data, IN AMDSBCFG* pConfig);
// Southbridge SBPOR Routines
@@ -605,4 +606,4 @@ void TurnOffCG2 (OUT void);
*/
void BackUpCG2 (OUT void);
-void XhciA12Fix (OUT void); \ No newline at end of file
+void XhciA12Fix (OUT void);
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-03 20:50:14 +0000