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authorAlexandru Gagniuc <alexandrux.gagniuc@intel.com>2015-10-27 10:27:30 -0700
committerAaron Durbin <adurbin@chromium.org>2016-02-17 04:57:12 +0100
commit6a622311e477d2ac387dc6bb2b9f0f287b149531 (patch)
treefc19bd485719dc4f3585e0d8b21cd77ea6810c22 /src
parent0188b1399a9b8601ae03797c3e61ad7d382391ea (diff)
downloadcoreboot-6a622311e477d2ac387dc6bb2b9f0f287b149531.tar.xz
arch/x86: Add option to disable default mmap_boot implementation
On certain platforms, the boot media is either not memory-mapped, or not mapped at the top of 4G. This makes the default mmap_boot implementation unsuitable. Add an option to allow such platforms to define their own mapping implementation. Change-Id: I8293126fd9cc1fd3d75072f7811e659765348e4a Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc@intel.com> Reviewed-on: https://review.coreboot.org/13319 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/arch/x86/Kconfig10
-rw-r--r--src/arch/x86/Makefile.inc8
2 files changed, 14 insertions, 4 deletions
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index 204a9be052..89e142a3ad 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -83,6 +83,16 @@ config RAMBASE
hex
default 0x100000
+# Traditionally BIOS region on SPI flash boot media was memory mapped right below
+# 4G and it was the last region in the IFD. This way translation between CPU
+# address space to flash address was trivial. However some IFDs on newer SoCs
+# have BIOS region sandwiched between descriptor and other regions. Turning off
+# this option enables soc code to provide custom mmap_boot.c which can be used to
+# implement complex translation.
+config X86_TOP4G_BOOTMEDIA_MAP
+ bool
+ default y
+
# This is something you almost certainly don't want to mess with.
# How many SIPIs do we send when starting up APs and cores?
# The answer in 2000 or so was '2'. Nowadays, on many systems,
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index 21084d3fd8..56e2ad0d59 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -105,7 +105,7 @@ ifeq ($(CONFIG_ARCH_BOOTBLOCK_X86_32)$(CONFIG_ARCH_BOOTBLOCK_X86_64),y)
bootblock-y += boot.c
bootblock-y += memcpy.c
bootblock-y += memset.c
-bootblock-y += mmap_boot.c
+bootblock-$(CONFIG_X86_TOP4G_BOOTMEDIA_MAP) += mmap_boot.c
bootblock-y += id.S
$(call src-to-obj,bootblock,$(dir)/id.S): $(obj)/build.h
@@ -354,7 +354,7 @@ romstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += cpu_common.c
romstage-y += memset.c
romstage-y += memcpy.c
romstage-y += memmove.c
-romstage-y += mmap_boot.c
+romstage-$(CONFIG_X86_TOP4G_BOOTMEDIA_MAP) += mmap_boot.c
romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
@@ -384,7 +384,7 @@ ramstage-y += memset.c
ramstage-y += memcpy.c
ramstage-y += memmove.c
ramstage-y += ebda.c
-ramstage-y += mmap_boot.c
+ramstage-$(CONFIG_X86_TOP4G_BOOTMEDIA_MAP) += mmap_boot.c
ramstage-$(CONFIG_COOP_MULTITASKING) += thread.c
ramstage-$(CONFIG_COOP_MULTITASKING) += thread_switch.S
ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
@@ -392,7 +392,7 @@ ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
smm-y += memset.c
smm-y += memcpy.c
smm-y += memmove.c
-smm-y += mmap_boot.c
+smm-$(CONFIG_X86_TOP4G_BOOTMEDIA_MAP) += mmap_boot.c
ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y)
rmodules_x86_32-y += memset.c