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author | Uwe Hermann <uwe@hermann-uwe.de> | 2009-10-28 17:10:51 +0000 |
---|---|---|
committer | Uwe Hermann <uwe@hermann-uwe.de> | 2009-10-28 17:10:51 +0000 |
commit | 6c73b4416ccda3d02bfaf9526ec356960260253b (patch) | |
tree | 59e666a757a957d1b89170ed4ee8b4b006d24b12 /src | |
parent | 1a08f582b54ec9fff0f356a824647ee40b3a5008 (diff) | |
download | coreboot-6c73b4416ccda3d02bfaf9526ec356960260253b.tar.xz |
Remove all build/ prefixes in the build output.
Also, remove one missing hardcoded "build" dir in the distclean target,
and clean up files generated by sconfig in 'make clean'.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4880 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r-- | src/arch/i386/Makefile.inc | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/src/arch/i386/Makefile.inc b/src/arch/i386/Makefile.inc index d6b73e9eae..b43a8a8648 100644 --- a/src/arch/i386/Makefile.inc +++ b/src/arch/i386/Makefile.inc @@ -31,6 +31,7 @@ ifeq ($(CONFIG_VGA_BIOS),y) @printf " VGABIOS $(CONFIG_FALLBACK_VGA_BIOS_FILE) $(CONFIG_FALLBACK_VGA_BIOS_ID)\n" $(CBFSTOOL) $(obj)/coreboot.rom add $(CONFIG_FALLBACK_VGA_BIOS_FILE) "pci$(CONFIG_FALLBACK_VGA_BIOS_ID).rom" optionrom endif + @printf " CBFSPRINT $(subst $(obj)/,,$(@))\n\n" $(CBFSTOOL) $(obj)/coreboot.rom print @@ -38,7 +39,7 @@ endif # Build the bootblock $(obj)/coreboot.bootblock: $(obj)/coreboot - @printf " OBJCOPY $(subst $(shell pwd)/,,$(@))\n" + @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" $(OBJCOPY) -O binary $< $@ $(obj)/ldscript.ld: $(ldscripts) $(obj)/ldoptions @@ -55,7 +56,7 @@ $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s: $(src)/arch/i386/init/crt0.S.lb $(obj)/ $(CC) -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include -I$(src)/arch/i386/include -I$(obj) -include $(obj)/config.h -I. -I$(src) $< > $@.new && mv $@.new $@ $(obj)/coreboot: $(initobjs) $(obj)/ldscript.ld - @printf " LINK $(subst $(shell pwd)/,,$(@))\n" + @printf " LINK $(subst $(obj)/,,$(@))\n" $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(obj)/ldscript.ld $(initobjs) $(NM) -n $(obj)/coreboot | sort > $(obj)/coreboot.map @@ -63,27 +64,27 @@ $(obj)/coreboot: $(initobjs) $(obj)/ldscript.ld # i386 specific tools $(obj)/option_table.h $(obj)/option_table.c: $(obj)/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout - @printf " OPTION $(subst $(shell pwd)/,,$(@))\n" + @printf " OPTION $(subst $(obj)/,,$(@))\n" $(obj)/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --header $(obj)/option_table.h --option $(obj)/option_table.c $(obj)/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src/include/pc80/mc146818rtc.h $(top)/src/include/boot/coreboot_tables.h $(obj)/config.h - @printf " HOSTCC $(subst $(shell pwd)/,,$(@))\n" + @printf " HOSTCC $(subst $(obj)/,,$(@))\n" $(HOSTCC) $(HOSTCFLAGS) -include $(obj)/config.h $< -o $@ ####################################################################### # Build the coreboot_ram (stage 2) $(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/config/coreboot_ram.ld #ldoptions - @printf " CC $(subst $(shell pwd)/,,$(@))\n" + @printf " CC $(subst $(obj)/,,$(@))\n" $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/config/coreboot_ram.ld $(obj)/coreboot_ram.o $(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map $(obj)/coreboot_ram.o: $(obj)/arch/i386/lib/c_start.o $(drivers) $(obj)/coreboot.a $(LIBGCC_FILE_NAME) - @printf " CC $(subst $(shell pwd)/,,$(@))\n" + @printf " CC $(subst $(obj)/,,$(@))\n" $(CC) -nostdlib -r -o $@ $(obj)/arch/i386/lib/c_start.o $(drivers) -Wl,-\( $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,-\) $(obj)/coreboot.a: $(objs) - @printf " AR $(subst $(shell pwd)/,,$(@))\n" + @printf " AR $(subst $(obj)/,,$(@))\n" rm -f $(obj)/coreboot.a $(AR) cr $(obj)/coreboot.a $(objs) |