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authordavid <david_wu@quantatw.com>2015-01-19 17:11:36 +0800
committerMartin Roth <martinroth@google.com>2015-12-26 20:51:29 +0100
commit80ef7b778e5e5ec8b2940c875df76bb705855ede (patch)
tree5579af966b3bae3ccb72e0f58179cc325441e4bd /src
parent0fa4f6f23d6bec4216e0be27526a009db50c8938 (diff)
downloadcoreboot-80ef7b778e5e5ec8b2940c875df76bb705855ede.tar.xz
IT8772F: Clean up it8772f includes and add a LED API
- Remove it8772f c includes - Add a new LED API, it8772f_gpio_led - Stumpy: using it8772f_gpio_led BUG=chrome-os-partner:28232 BRANCH=Guado TEST=emerge-guado coreboot chromeos-bootimage Change-Id: I08de52515d3c1e7e85d1761c09a0cebffda7dda3 Signed-off-by: David Wu <David_Wu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/241813 Tested-by: David Wu <david_wu@quantatw.com> Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: David Wu <david_wu@quantatw.com> Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/12797 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/samsung/stumpy/romstage.c5
-rw-r--r--src/mainboard/samsung/stumpy/smihandler.c40
-rw-r--r--src/superio/ite/it8772f/Makefile.inc1
-rw-r--r--src/superio/ite/it8772f/early_init.c19
-rw-r--r--src/superio/ite/it8772f/it8772f.h20
5 files changed, 58 insertions, 27 deletions
diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c
index f76de7a8b0..bf1ddb37be 100644
--- a/src/mainboard/samsung/stumpy/romstage.c
+++ b/src/mainboard/samsung/stumpy/romstage.c
@@ -155,7 +155,10 @@ static void setup_sio_gpios(void)
/*
* GPIO45 as LED_POWER#
*/
- it8772f_gpio_setup(DUMMY_DEV, 4, 0x20, 0x20, 0x20, 0x20, 0x20);
+ it8772f_gpio_led(DUMMY_DEV, 4 /* set */, (0x1<<5) /* select */,
+ 0x00 /* polarity: non-inverting */, 0x00 /* 0=pulldown */,
+ (0x1<<5) /* output */, (0x1<<5) /* 1=Simple IO function */,
+ SIO_GPIO_BLINK_GPIO45, IT8772F_GPIO_BLINK_FREQUENCY_1_HZ);
/*
* GPIO51 as USBPWRON8#
diff --git a/src/mainboard/samsung/stumpy/smihandler.c b/src/mainboard/samsung/stumpy/smihandler.c
index 39df8a4a55..2e0f0dd25d 100644
--- a/src/mainboard/samsung/stumpy/smihandler.c
+++ b/src/mainboard/samsung/stumpy/smihandler.c
@@ -22,44 +22,32 @@
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <cpu/intel/model_206ax/model_206ax.h>
-/* FIXME: Include romstage serial for SIO helper functions */
-#include <superio/ite/it8772f/early_init.c>
-//#include <superio/ite/it8772f/it8772f.h>
+/* Include for SIO helper functions */
+#include <superio/ite/it8772f/it8772f.h>
#define DUMMY_DEV PNP_DEV(0x2e, 0)
/*
* Change LED_POWER# (SIO GPIO 45) state based on sleep type.
- * The IO address is hardcoded as we don't have device path in SMM.
- */
-#define SIO_GPIO_BASE_SET4 (0x730 + 3)
-#define SIO_GPIO_BLINK_GPIO45 0x25
+*/
void mainboard_smi_sleep(u8 slp_typ)
{
- u8 reg8;
-
+ printk(BIOS_DEBUG, "SMI: sleep S%d\n", slp_typ);
switch (slp_typ) {
case 3:
case 4:
- /* Blink LED */
- it8772f_enter_conf(DUMMY_DEV);
- it8772f_sio_write(DUMMY_DEV, IT8772F_CONFIG_REG_LDN, IT8772F_GPIO);
- /* Enable blink pin map */
- it8772f_sio_write(DUMMY_DEV, IT8772F_GPIO_LED_BLINK1_PINMAP,
- SIO_GPIO_BLINK_GPIO45);
- /* Enable 4HZ blink */
- it8772f_sio_write(DUMMY_DEV, IT8772F_GPIO_LED_BLINK1_CONTROL, 0x02);
- /* Set GPIO to alternate function */
- reg8 = it8772f_sio_read(DUMMY_DEV, GPIO_REG_ENABLE(3));
- reg8 &= ~(1 << 5);
- it8772f_sio_write(DUMMY_DEV, GPIO_REG_ENABLE(3), reg8);
- it8772f_exit_conf(DUMMY_DEV);
+ it8772f_gpio_led(DUMMY_DEV, 4 /* set */, (0x1<<5) /* select */,
+ (0x1<<5) /* polarity */, (0x1<<5) /* 1=pullup */,
+ (0x1<<5) /* output */, 0x00, /* 0=Alternate function */
+ SIO_GPIO_BLINK_GPIO45, IT8772F_GPIO_BLINK_FREQUENCY_1_HZ);
break;
case 5:
- /* Turn off LED */
- reg8 = inb(SIO_GPIO_BASE_SET4);
- reg8 |= (1 << 5);
- outb(reg8, SIO_GPIO_BASE_SET4);
+ it8772f_gpio_led(DUMMY_DEV, 4 /* set */, (0x1<<5) /* select */,
+ 0x00 /* polarity: non-inverting */, 0x00 /* 0=pulldown */,
+ (0x1<<5) /* output */, (0x1<<5) /* 1=Simple IO function */,
+ SIO_GPIO_BLINK_GPIO45, IT8772F_GPIO_BLINK_FREQUENCY_1_HZ);
+ break;
+ default:
break;
}
}
diff --git a/src/superio/ite/it8772f/Makefile.inc b/src/superio/ite/it8772f/Makefile.inc
index f39e2ba409..a0bf94db75 100644
--- a/src/superio/ite/it8772f/Makefile.inc
+++ b/src/superio/ite/it8772f/Makefile.inc
@@ -16,3 +16,4 @@
romstage-$(CONFIG_SUPERIO_ITE_IT8772F) += early_init.c
ramstage-$(CONFIG_SUPERIO_ITE_IT8772F) += superio.c
+smm-$(CONFIG_SUPERIO_ITE_IT8772F) += early_init.c
diff --git a/src/superio/ite/it8772f/early_init.c b/src/superio/ite/it8772f/early_init.c
index 893e69b312..eed1e9c39f 100644
--- a/src/superio/ite/it8772f/early_init.c
+++ b/src/superio/ite/it8772f/early_init.c
@@ -81,3 +81,22 @@ void it8772f_gpio_setup(pnp_devfn_t dev, int set, u8 select, u8 polarity,
it8772f_sio_write(dev, GPIO_REG_PULLUP(set), pullup);
it8772f_exit_conf(dev);
}
+
+/* Configure LED GPIOs */
+void it8772f_gpio_led(pnp_devfn_t dev,int set, u8 select, u8 polarity, u8 pullup,
+ u8 output, u8 enable, u8 led_pin_map, u8 led_freq)
+{
+ set--; /* Set 1 is offset 0 */
+ it8772f_enter_conf(dev);
+ it8772f_sio_write(dev, IT8772F_CONFIG_REG_LDN, IT8772F_GPIO);
+ if (set < 5) {
+ it8772f_sio_write(dev, IT8772F_GPIO_LED_BLINK1_PINMAP, led_pin_map);
+ it8772f_sio_write(dev, IT8772F_GPIO_LED_BLINK1_CONTROL, led_freq);
+ it8772f_sio_write(dev, GPIO_REG_SELECT(set), select);
+ it8772f_sio_write(dev, GPIO_REG_ENABLE(set), enable);
+ it8772f_sio_write(dev, GPIO_REG_POLARITY(set), polarity);
+ }
+ it8772f_sio_write(dev, GPIO_REG_OUTPUT(set), output);
+ it8772f_sio_write(dev, GPIO_REG_PULLUP(set), pullup);
+ it8772f_exit_conf(dev);
+}
diff --git a/src/superio/ite/it8772f/it8772f.h b/src/superio/ite/it8772f/it8772f.h
index a113bc7a35..8e82bef6ab 100644
--- a/src/superio/ite/it8772f/it8772f.h
+++ b/src/superio/ite/it8772f/it8772f.h
@@ -92,12 +92,29 @@
/* GPIO interface */
#define IT8772F_GPIO_LED_BLINK1_PINMAP 0xf8
+
+#define SIO_GPIO_BLINK_GPIO10 0x08
+#define SIO_GPIO_BLINK_GPIO45 0x25
+
#define IT8772F_GPIO_LED_BLINK1_CONTROL 0xf9
+#define IT8772F_GPIO_BLINK_FREQUENCY_4_HZ (0<<1)
+#define IT8772F_GPIO_BLINK_FREQUENCY_1_HZ (1<<1)
+#define IT8772F_GPIO_BLINK_FREQUENCY_1_4_HZ (2<<1)
+#define IT8772F_GPIO_BLINK_FREQUENCY_1_8_HZ (3<<1)
+
#define GPIO_REG_SELECT(x) (0x25 + (x))
+
+/* GPIO Polarity Select: 1: Inverting, 0: Non-inverting */
#define GPIO_REG_POLARITY(x) (0xb0 + (x))
+
+/* GPIO Inernal Pull-up: 1: Enable, 0: Disable */
#define GPIO_REG_PULLUP(x) (0xb8 + (x))
+
+/* GPIO Fucntion Select: 1: Simple I/O, 0: Alternate function */
#define GPIO_REG_ENABLE(x) (0xc0 + (x))
+
+/* GPIO Mode: 0: input mode, 1: output mode */
#define GPIO_REG_OUTPUT(x) (0xc8 + (x))
#include <arch/io.h>
@@ -116,5 +133,8 @@ void it8772f_gpio_setup(pnp_devfn_t dev, int set, u8 select, u8 polarity,
void it8772f_enter_conf(pnp_devfn_t dev);
void it8772f_exit_conf(pnp_devfn_t dev);
+void it8772f_gpio_led(pnp_devfn_t dev, int set, u8 select, u8 polarity, u8 pullup,
+ u8 output, u8 enable, u8 led_pin_map, u8 led_freq);
+
#endif /* SUPERIO_ITE_IT8772F_H */