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authorStefan Reinauer <reinauer@chromium.org>2012-11-15 15:53:30 -0800
committerRonald G. Minnich <rminnich@gmail.com>2012-11-20 01:52:53 +0100
commit82ecf4c582fdab341d88bd80ae3e9a629619c263 (patch)
treea86bb4279e0315156cfc4f95a6bf88521fdb3c53 /src
parent40f36e0d8d15a275d0109eac778e3b99bf4e0173 (diff)
downloadcoreboot-82ecf4c582fdab341d88bd80ae3e9a629619c263.tar.xz
secondary.S: Fix dropping ramstage.a
This unused code was not silently dropped as before. Change-Id: Ic76c58e233869a60c3a8a27c2efc2182b3a4442d Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1863 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/cpu/x86/lapic/secondary.S2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/cpu/x86/lapic/secondary.S b/src/cpu/x86/lapic/secondary.S
index 045454e2ed..2e0620e2da 100644
--- a/src/cpu/x86/lapic/secondary.S
+++ b/src/cpu/x86/lapic/secondary.S
@@ -1,6 +1,7 @@
#include <cpu/x86/mtrr.h>
#include <cpu/x86/lapic_def.h>
+#if CONFIG_SMP && CONFIG_MAX_CPUS > 1
.text
.globl _secondary_start, _secondary_start_end
.balign 4096
@@ -62,3 +63,4 @@ __ap_protected_start:
jmp 1b
.code32
+#endif