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authorFlorian Zumbiehl <florz@florz.de>2011-11-01 20:19:04 +0100
committerRudolf Marek <r.marek@assembler.cz>2011-11-24 00:12:41 +0100
commit912d8919d4496379469cd898391ca08f1a90c225 (patch)
tree93eca616646769c8b9da12661b54b86a32781e9e /src
parentfa48b969086216341f77738df4b912859010fcf6 (diff)
downloadcoreboot-912d8919d4496379469cd898391ca08f1a90c225.tar.xz
vt8237: add support for setting the power state after loss of power
Change-Id: Ia7e3e77235530e952b2e84fdec8373b90fa59b7a Signed-off-by: Florian Zumbiehl <florz@florz.de> Reviewed-on: http://review.coreboot.org/437 Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
Diffstat (limited to 'src')
-rw-r--r--src/southbridge/via/vt8237r/lpc.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/southbridge/via/vt8237r/lpc.c b/src/southbridge/via/vt8237r/lpc.c
index b1e1afe9c2..207dfdb335 100644
--- a/src/southbridge/via/vt8237r/lpc.c
+++ b/src/southbridge/via/vt8237r/lpc.c
@@ -421,6 +421,9 @@ static void vt8237s_init(struct device *dev)
static void vt8237_common_init(struct device *dev)
{
u8 enables, byte;
+#if !CONFIG_EPIA_VT8237R_INIT
+ unsigned char pwr_on;
+#endif
/* Enable addr/data stepping. */
byte = pci_read_config8(dev, PCI_COMMAND);
@@ -508,6 +511,15 @@ static void vt8237_common_init(struct device *dev)
*/
pci_write_config8(dev, 0x5b, 0xb);
+ /* configure power state of the board after loss of power */
+ if (get_option(&pwr_on, "power_on_after_fail") < 0)
+ pwr_on = 1;
+ enables = pci_read_config8(dev, 0x58);
+ pci_write_config8(dev, 0x58, enables & ~0x02);
+ outb(0x0d, 0x70);
+ outb(pwr_on ? 0x00 : 0x80, 0x71);
+ pci_write_config8(dev, 0x58, enables);
+
/* Set 0x58 to 0x43 APIC and RTC. */
pci_write_config8(dev, 0x58, 0x43);