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authorYinghai Lu <yinghai.lu@amd.com>2006-12-20 20:21:05 +0000
committerYinghai Lu <yinghailu@gmail.com>2006-12-20 20:21:05 +0000
commita5fc22fd6b45e96534802dd1069060990f4077ff (patch)
tree11d802c9c5d0ac4c71f241ed3ea89729373345df /src
parent6c3874e8f880d6d9e4f3012d38ddd1f34ff2ec18 (diff)
downloadcoreboot-a5fc22fd6b45e96534802dd1069060990f4077ff.tar.xz
htx card on io apic on htx slot of dk8_htx
Signed-off-by: Yinghai Lu <yinghai.lu@amd.com> Acked-by: Yinghai Lu <yinghai.lu@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2533 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/iwill/dk8_htx/Config.lb7
-rw-r--r--src/mainboard/iwill/dk8_htx/acpi_tables.c5
-rw-r--r--src/mainboard/iwill/dk8_htx/dx/htx_no_ioapic.asl20
-rw-r--r--src/mainboard/iwill/dk8_htx/dx/pci5.asl68
-rw-r--r--src/mainboard/iwill/dk8_htx/dx/pci5_hc.asl1
5 files changed, 100 insertions, 1 deletions
diff --git a/src/mainboard/iwill/dk8_htx/Config.lb b/src/mainboard/iwill/dk8_htx/Config.lb
index 935c98f491..de7d6ff7fd 100644
--- a/src/mainboard/iwill/dk8_htx/Config.lb
+++ b/src/mainboard/iwill/dk8_htx/Config.lb
@@ -119,6 +119,13 @@ if HAVE_ACPI_TABLES
action "mv pci4.hex ssdt4.c"
end
object ./ssdt4.o
+ makerule ssdt5.c
+ depends "$(MAINBOARD)/dx/pci5.asl"
+ action "iasl -tc $(MAINBOARD)/dx/pci5.asl"
+ action "perl -pi -e 's/AmlCode/AmlCode_ssdt5/g' pci5.hex"
+ action "mv pci5.hex ssdt5.c"
+ end
+ object ./ssdt5.o
end
end
diff --git a/src/mainboard/iwill/dk8_htx/acpi_tables.c b/src/mainboard/iwill/dk8_htx/acpi_tables.c
index f35e7f98ec..28cf584323 100644
--- a/src/mainboard/iwill/dk8_htx/acpi_tables.c
+++ b/src/mainboard/iwill/dk8_htx/acpi_tables.c
@@ -44,6 +44,7 @@ extern unsigned char AmlCode_ssdt[];
extern unsigned char AmlCode_ssdt2[];
extern unsigned char AmlCode_ssdt3[];
extern unsigned char AmlCode_ssdt4[];
+extern unsigned char AmlCode_ssdt5[];
#endif
#define IO_APIC_ADDR 0xfec00000UL
@@ -286,7 +287,9 @@ unsigned long write_acpi_tables(unsigned long start)
p = AmlCode_ssdt4;
break;
default:
- continue;
+ //HTX no io apic
+ p = AmlCode_ssdt5;
+ break;
}
current += ((acpi_header_t *)p)->length;
memcpy((void *)ssdtx, (void *)p, ((acpi_header_t *)p)->length);
diff --git a/src/mainboard/iwill/dk8_htx/dx/htx_no_ioapic.asl b/src/mainboard/iwill/dk8_htx/dx/htx_no_ioapic.asl
new file mode 100644
index 0000000000..95a4860c63
--- /dev/null
+++ b/src/mainboard/iwill/dk8_htx/dx/htx_no_ioapic.asl
@@ -0,0 +1,20 @@
+/*
+ * Copyright 2006 AMD
+ */
+
+ Device (HTXA)
+ {
+ /* HTX */
+ Method (_ADR, 0, NotSerialized)
+ {
+ Return (DADD(GHCD(HCIN, 0), 0x00000000))
+ }
+
+ Method (_PRW, 0, NotSerialized)
+ {
+ If (CondRefOf (\_S3, Local0)) { Return (Package (0x02) { 0x29, 0x03 }) }
+ Else { Return (Package (0x02) { 0x29, 0x01 }) }
+ }
+
+ }
+
diff --git a/src/mainboard/iwill/dk8_htx/dx/pci5.asl b/src/mainboard/iwill/dk8_htx/dx/pci5.asl
new file mode 100644
index 0000000000..5f251616f0
--- /dev/null
+++ b/src/mainboard/iwill/dk8_htx/dx/pci5.asl
@@ -0,0 +1,68 @@
+/*
+ * Copyright 2005 AMD
+ */
+DefinitionBlock ("SSDT5.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
+{
+ Scope (_SB)
+ {
+ External (DADD, MethodObj)
+ External (GHCE, MethodObj)
+ External (GHCN, MethodObj)
+ External (GHCL, MethodObj)
+ External (GHCD, MethodObj)
+ External (GNUS, MethodObj)
+ External (GIOR, MethodObj)
+ External (GMEM, MethodObj)
+ External (GWBN, MethodObj)
+ External (GBUS, MethodObj)
+
+ External (PICF)
+
+ External (\_SB.PCI0.LNKA, DeviceObj)
+ External (\_SB.PCI0.LNKB, DeviceObj)
+ External (\_SB.PCI0.LNKC, DeviceObj)
+ External (\_SB.PCI0.LNKD, DeviceObj)
+
+ Device (PCIX)
+ {
+
+ // BUS ? Second HT Chain
+ Name (HCIN, 0xcc) // HC2 0x01
+
+ Name (_UID, 0xdd) // HC 0x03
+
+ Name (_HID, "PNP0A03")
+
+ Method (_ADR, 0, NotSerialized) //Fake bus should be 0
+ {
+ Return (DADD(GHCN(HCIN), 0x00000000))
+ }
+
+ Method (_BBN, 0, NotSerialized)
+ {
+ Return (GBUS (GHCN(HCIN), GHCL(HCIN)))
+ }
+
+ Method (_STA, 0, NotSerialized)
+ {
+ Return (\_SB.GHCE(HCIN))
+ }
+
+ Method (_CRS, 0, NotSerialized)
+ {
+ Name (BUF0, ResourceTemplate () { })
+ Store( GHCN(HCIN), Local4)
+ Store( GHCL(HCIN), Local5)
+
+ Concatenate (\_SB.GIOR (Local4, Local5), BUF0, Local1)
+ Concatenate (\_SB.GMEM (Local4, Local5), Local1, Local2)
+ Concatenate (\_SB.GWBN (Local4, Local5), Local2, Local3)
+ Return (Local3)
+ }
+
+ Include ("pci5_hc.asl")
+ }
+ }
+
+}
+
diff --git a/src/mainboard/iwill/dk8_htx/dx/pci5_hc.asl b/src/mainboard/iwill/dk8_htx/dx/pci5_hc.asl
new file mode 100644
index 0000000000..6b9276cf04
--- /dev/null
+++ b/src/mainboard/iwill/dk8_htx/dx/pci5_hc.asl
@@ -0,0 +1 @@
+ Include ("htx_no_ioapic.asl")