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authorStefan Reinauer <reinauer@chromium.org>2011-10-14 15:18:29 -0700
committerUwe Hermann <uwe@hermann-uwe.de>2011-10-15 12:30:02 +0200
commitab87254b6130d74f080e2c5ee9abb4570560e6a0 (patch)
tree8e239c8b64b9f2177a953f9ead4b41421831c00c /src
parent2d172993953ae777aaec13efddfe6ed91209bd02 (diff)
downloadcoreboot-ab87254b6130d74f080e2c5ee9abb4570560e6a0.tar.xz
use acpi.h include instead of manually adding acpi_slp_type.
Change-Id: I2a3aaf10e453fa6cce8a993356f2a0587178209a Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/276 Tested-by: build bot (Jenkins) Reviewed-by: Uwe Hermann <uwe@hermann-uwe.de>
Diffstat (limited to 'src')
-rw-r--r--src/northbridge/intel/i945/northbridge.c3
-rw-r--r--src/northbridge/intel/sch/northbridge.c3
-rw-r--r--src/southbridge/intel/i82801gx/lpc.c3
-rw-r--r--src/southbridge/via/vt8237r/lpc.c4
4 files changed, 4 insertions, 9 deletions
diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c
index dfe4fe73bd..a10bb4a6f1 100644
--- a/src/northbridge/intel/i945/northbridge.c
+++ b/src/northbridge/intel/i945/northbridge.c
@@ -29,6 +29,7 @@
#include <bitops.h>
#include <cpu/cpu.h>
#include <boot/tables.h>
+#include <arch/acpi.h>
#include "chip.h"
#include "i945.h"
@@ -252,8 +253,6 @@ static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
}
#if CONFIG_HAVE_ACPI_RESUME
-extern u8 acpi_slp_type;
-
static void northbridge_init(struct device *dev)
{
switch (pci_read_config32(dev, SKPAD)) {
diff --git a/src/northbridge/intel/sch/northbridge.c b/src/northbridge/intel/sch/northbridge.c
index ccd0d331f2..7b7c67b8fc 100644
--- a/src/northbridge/intel/sch/northbridge.c
+++ b/src/northbridge/intel/sch/northbridge.c
@@ -29,6 +29,7 @@
#include <bitops.h>
#include <cpu/cpu.h>
#include <boot/tables.h>
+#include <arch/acpi.h>
#include "chip.h"
#include "sch.h"
@@ -267,8 +268,6 @@ static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
}
#if CONFIG_HAVE_ACPI_RESUME
-extern u8 acpi_slp_type;
-
static void northbridge_init(struct device *dev)
{
switch (pci_read_config32(dev, SKPAD)) {
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index b4b2f41377..ab3c915532 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -27,6 +27,7 @@
#include <pc80/i8259.h>
#include <arch/io.h>
#include <arch/ioapic.h>
+#include <arch/acpi.h>
#include <cpu/cpu.h>
#include "i82801gx.h"
#include <cpu/x86/smm.h>
@@ -170,8 +171,6 @@ static void i82801gx_gpi_routing(device_t dev)
pci_write_config32(dev, 0xb8, reg32);
}
-extern u8 acpi_slp_type;
-
static void i82801gx_power_options(device_t dev)
{
u8 reg8;
diff --git a/src/southbridge/via/vt8237r/lpc.c b/src/southbridge/via/vt8237r/lpc.c
index 61f4989f54..3e2f215751 100644
--- a/src/southbridge/via/vt8237r/lpc.c
+++ b/src/southbridge/via/vt8237r/lpc.c
@@ -32,6 +32,7 @@
#include <pc80/keyboard.h>
#include <pc80/i8259.h>
#include <stdlib.h>
+#include <arch/acpi.h>
#include "vt8237r.h"
#include "chip.h"
@@ -147,9 +148,6 @@ static void pci_routing_fixup(struct device *dev)
* This avoids having to handle any System Management Interrupts (SMIs).
*/
-extern u8 acpi_slp_type;
-
-
static void setup_pm(device_t dev)
{
u16 tmp;