diff options
author | amanda_hwang <amanda_hwang@compal.corp-partner.google.com> | 2018-03-08 11:04:40 +0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-03-08 18:05:09 +0000 |
commit | b3b47e1a8519b8d61468a8b3afdfa2b87593d245 (patch) | |
tree | 5db778f5081116c46ca2d74d652a82ce93138043 /src | |
parent | cc761e84af6b94795a7eae8ed476e93b687d47d2 (diff) | |
download | coreboot-b3b47e1a8519b8d61468a8b3afdfa2b87593d245.tar.xz |
mb/google/poppy : Get SKU_ID from EC for Nami/Vayne
CBI abbreviates Cros Board Info.
BUG=b:74177699
BRANCH=master
TEST=Verify CPU log shows expected SKU ID on Nami.
Change-Id: I42dd177de8c49cf3c122c2ebb1fcf42e5ba4cd75
Signed-off-by: amanda_hwang <amanda_hwang@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/24996
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src')
4 files changed, 59 insertions, 1 deletions
diff --git a/src/mainboard/google/poppy/ramstage.c b/src/mainboard/google/poppy/ramstage.c index 39df3eeb85..5ef245180b 100644 --- a/src/mainboard/google/poppy/ramstage.c +++ b/src/mainboard/google/poppy/ramstage.c @@ -22,7 +22,12 @@ void mainboard_silicon_init_params(FSP_SIL_UPD *params) { const struct pad_config *pads; size_t num; - + variant_devtree_update(); pads = variant_gpio_table(&num); gpio_configure_pads(pads, num); } + +void __attribute__((weak)) variant_devtree_update(void) +{ + /* Override dev tree settings per board */ +} diff --git a/src/mainboard/google/poppy/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/poppy/variants/baseboard/include/baseboard/variants.h index 3cf11f637b..e051c735c1 100644 --- a/src/mainboard/google/poppy/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/poppy/variants/baseboard/include/baseboard/variants.h @@ -50,6 +50,7 @@ struct memory_params { void variant_memory_params(struct memory_params *p); int variant_memory_sku(void); +void variant_devtree_update(void); struct nhlt; void variant_nhlt_init(struct nhlt *nhlt); diff --git a/src/mainboard/google/poppy/variants/nami/Makefile.inc b/src/mainboard/google/poppy/variants/nami/Makefile.inc index 1d96df2ecc..63e8e77dc7 100644 --- a/src/mainboard/google/poppy/variants/nami/Makefile.inc +++ b/src/mainboard/google/poppy/variants/nami/Makefile.inc @@ -24,3 +24,4 @@ romstage-y += memory.c ramstage-y += gpio.c ramstage-y += nhlt.c ramstage-y += pl2.c +ramstage-y += mainboard.c diff --git a/src/mainboard/google/poppy/variants/nami/mainboard.c b/src/mainboard/google/poppy/variants/nami/mainboard.c new file mode 100644 index 0000000000..5b3e2ea6a6 --- /dev/null +++ b/src/mainboard/google/poppy/variants/nami/mainboard.c @@ -0,0 +1,51 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <chip.h> +#include <device/device.h> +#include <ec/google/chromeec/ec.h> +#include <baseboard/variants.h> + +#define SKU_UNKNOWN 0xFFFF +#define SKU_0_NAMI 0x3A7B +#define SKU_1_VAYNE 0x3A63 +#define SKU_2_VAYNE 0x3A7F + +static uint16_t board_sku_id(void) +{ + static int sku_id = -1; + uint32_t id; + if (sku_id >= 0) + return sku_id; + if (google_chromeec_cbi_get_sku_id(&id)) + return SKU_UNKNOWN; + sku_id = id; + return sku_id; +} + +void variant_devtree_update(void) +{ + /* Override dev tree settings per board */ + uint16_t sku_id = board_sku_id(); + device_t root = SA_DEV_ROOT; + config_t *cfg = root->chip_info; + switch (sku_id) { + case SKU_1_VAYNE: + cfg->usb2_ports[5].enable = 0;//rear camera + break; + default: + break; + } +} |