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author | Felix Held <felix-coreboot@felixheld.de> | 2020-12-09 21:37:44 +0100 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2020-12-11 00:43:51 +0000 |
commit | d3e977112a6b07d372e36667dbe8f9c8fe5c30f7 (patch) | |
tree | 37dad02f23ec46f52908421c9f2c0ee93d6df760 /src | |
parent | 6f8f9c969be9d471464f1b6a42b4bb1c2590db5c (diff) | |
download | coreboot-d3e977112a6b07d372e36667dbe8f9c8fe5c30f7.tar.xz |
soc/amd/picasso: move UART console code to common folder
Change-Id: Ibc9a4c05bdfc7cd3cd0eada67563386c95d2b50e
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48515
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/soc/amd/common/block/uart/Makefile.inc | 15 | ||||
-rw-r--r-- | src/soc/amd/common/block/uart/uart_console.c (renamed from src/soc/amd/picasso/uart_console.c) | 0 | ||||
-rw-r--r-- | src/soc/amd/picasso/Makefile.inc | 5 |
3 files changed, 15 insertions, 5 deletions
diff --git a/src/soc/amd/common/block/uart/Makefile.inc b/src/soc/amd/common/block/uart/Makefile.inc new file mode 100644 index 0000000000..9d968455dd --- /dev/null +++ b/src/soc/amd/common/block/uart/Makefile.inc @@ -0,0 +1,15 @@ +ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_UART),y) + +bootblock-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c + +romstage-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c + +verstage_x86-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c + +ramstage-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c + +ifeq ($(CONFIG_DEBUG_SMI),y) +smm-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c +endif + +endif # CONFIG_SOC_AMD_COMMON_BLOCK_UART diff --git a/src/soc/amd/picasso/uart_console.c b/src/soc/amd/common/block/uart/uart_console.c index c1c17232fb..c1c17232fb 100644 --- a/src/soc/amd/picasso/uart_console.c +++ b/src/soc/amd/common/block/uart/uart_console.c diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 53b8c8da74..42f1ef59f6 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -17,7 +17,6 @@ bootblock-y += bootblock.c bootblock-y += early_fch.c bootblock-y += i2c.c bootblock-y += uart.c -bootblock-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c bootblock-y += gpio.c bootblock-y += reset.c @@ -27,14 +26,12 @@ romstage-y += gpio.c romstage-y += reset.c romstage-y += memmap.c romstage-y += uart.c -romstage-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c romstage-y += psp.c romstage-y += mrc_cache.c verstage-y += i2c.c verstage_x86-y += gpio.c verstage_x86-y += uart.c -verstage_x86-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c verstage_x86-y += reset.c ramstage-y += i2c.c @@ -53,7 +50,6 @@ ramstage-y += sata.c ramstage-y += memmap.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c ramstage-y += uart.c -ramstage-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c ramstage-y += finalize.c ramstage-y += soc_util.c ramstage-y += psp.c @@ -67,7 +63,6 @@ ramstage-y += dmi.c smm-y += smihandler.c ifeq ($(CONFIG_DEBUG_SMI),y) smm-y += uart.c -smm-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c endif smm-y += gpio.c smm-y += psp.c |