diff options
| author | Furquan Shaikh <furquan@chromium.org> | 2017-08-28 14:32:05 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2017-08-29 20:24:18 +0000 |
| commit | eeab2710efbfc4393756ae89478f649f035b3732 (patch) | |
| tree | 89f3a522a2dec780776967fe7f7730aada29a6b3 /src | |
| parent | feefbd71270123a4071395acc32878bf6bb10ae2 (diff) | |
| download | coreboot-eeab2710efbfc4393756ae89478f649f035b3732.tar.xz | |
mainboard/google/soraka: Tune I2C params (hcnt, lcnt, hold time)
Tune I2C params for I2C buses 0, 1, 2, 4 and 5 to ensure that the
frequency does not exceed 400KHz.
BUG=b:35948024
TEST=Verified for 25 iterations that the frequency on each bus ranges
<= 400KHz.
I2C0: 393 - 397
I2C1: 393 - 400
I2C2: 392 - 400
I2C4: 392 - 400
I2C5: 392 - 400
Change-Id: I3e12c75eb7e82a83aa6a6bcfcc11c12f83f2d3d4
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/21242
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/poppy/variants/soraka/devicetree.cb | 77 |
1 files changed, 65 insertions, 12 deletions
diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index 88c7c7dbeb..3366f2642c 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -165,23 +165,76 @@ chip soc/intel/skylake register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Port register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Empty - register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3" # Touchscreen - register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3" # H1 - register "i2c_voltage[2]" = "I2C_VOLTAGE_1V8" # Camera - register "i2c_voltage[3]" = "I2C_VOLTAGE_1V8" # Pen - register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # Camera - register "i2c_voltage[5]" = "I2C_VOLTAGE_1V8" # Audio - - # Use GSPI0 for cr50 TPM. Early init is required to set up a BAR for TPM - # communication before memory is up. - register "gspi[0]" = "{ - .speed_mhz = 1, - .early_init = 1, + # Touchscreen + register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3" + register "i2c[0]" = "{ + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 180, + .scl_hcnt = 85, + .sda_hold = 36, + }, }" + # H1 + register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3" # Configure I2C1 for cr50 TPM. Early init is required to set up a BAR # for TPM communication before memory is up. register "i2c[1]" = "{ + .early_init = 1, + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 190, + .scl_hcnt = 90, + .sda_hold = 36, + }, + }" + + # Camera + register "i2c_voltage[2]" = "I2C_VOLTAGE_1V8" + register "i2c[2]" = "{ + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 192, + .scl_hcnt = 90, + .sda_hold = 36, + }, + }" + + # Pen + register "i2c_voltage[3]" = "I2C_VOLTAGE_1V8" + + # Camera + register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" + register "i2c[4]" = "{ + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 190, + .scl_hcnt = 90, + .sda_hold = 36, + }, + }" + + # Audio + register "i2c_voltage[5]" = "I2C_VOLTAGE_1V8" + register "i2c[5]" = "{ + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 180, + .scl_hcnt = 80, + .sda_hold = 36, + }, + }" + + # Use GSPI0 for cr50 TPM. Early init is required to set up a BAR for TPM + # communication before memory is up. + register "gspi[0]" = "{ + .speed_mhz = 1, .early_init = 1, }" |